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[Com Port] uart2iic

Description: UART转I2C的Verilog HDL代码，由北京邮电大学《VerilogHDL设计与EDA技术基础》教师编写-UART to I2C of the Verilog HDL code, by the Beijing University of Posts and Telecommunications VerilogHDL design and EDA technology infrastructure Teacher preparation
Platform: | Size: 3072 | Author: emulous | Hits:

[Com Port] demo_24c01a

Description: 24C01A的Verilog HDL仿真代码，用于I2C接口模块的测试，由北京邮电大学《VerilogHDL设计与EDA技术基础》教师编写-24C01A simulation of Verilog HDL code for the I2C interface module of the test, by the Beijing University of Posts and Telecommunications VerilogHDL design and EDA technology infrastructure Teacher preparation
Platform: | Size: 1024 | Author: emulous | Hits:

[Home Personal application] digtalclk

Description: 用Altera公司的QuartusII编写的电子钟程序，可以下载至开发板，实现一个智能数字钟功能，计时，校时，闹钟，跑表等功能，也可用于学习verilog HDL语言与数字逻辑-Using Altera s QuartusII procedures for the preparation of electronic bell, you can download to a development board, the realization of an intelligent digital clock function, time, school time, alarm clock, stopwatch functions can also be used to study verilog HDL language and digital logic
Platform: | Size: 2094080 | Author: 张欢 | Hits:

[Other] verilog

Description: 一个介绍verilog HDL的ppt文档，包括全部的22章。-Verilog HDL a presentation of ppt documents, including all of Chapter 22.
Platform: | Size: 1549312 | Author: 林熙鹏 | Hits:

[VHDL-FPGA-Verilog] VerilogHDLdigitaldesigncode

Description: Vlerilog HDL高级数字设计源码，有兴趣者可以来看看，保证是完整版-Advanced Digital Design Vlerilog HDL source, who are interested can look at it, guaranteed to be the full version
Platform: | Size: 934912 | Author: zhyu | Hits:

[Other Embeded program] AD7865test1

Description: verilog hdl写的利用fpga控制ad7865进行多路ad数据采集的程序源代码。-err
Platform: | Size: 309248 | Author: nwpu2005 | Hits:

[VHDL-FPGA-Verilog] VerilogHDL

Description: 《设计与验证Verilog HDL》光盘内容-err
Platform: | Size: 1003520 | Author: jzhupo | Hits:

[VHDL-FPGA-Verilog] verilog_tec

Description: 硬件描述语言verilog HDL语法讲解，附实例，该教程通俗易懂。-Verilog HDL hardware description language to explain grammar, with examples, the tutorial easy to understand.
Platform: | Size: 4169728 | Author: 尹秀清 | Hits:

[VHDL-FPGA-Verilog] VerilogHDL_counter

Description: 采用Verilog HDL语言编写的数字频率计，被测波形分别为方波、三角波和正弦波；采用6个数码管显示结果，三档量程可调，工程价值很高，-err
Platform: | Size: 1252352 | Author: 廖耿耿 | Hits:

[VHDL-FPGA-Verilog] VerilogHDL_trafficlight

Description: 采用Verilog HDL语言编写的交通灯控制系统，这是一个完整的毕设课题，分别有分频、显示译码、倒计时和动态显示驱动模块，实用价值很高，-Using Verilog HDL language of the traffic lights control system, which is a complete set of BI subjects who were frequent, indicating decoding, countdown and dynamic display driver module, a very high practical value,
Platform: | Size: 363520 | Author: 廖耿耿 | Hits:

[Graph program] altera_tft_lcd_controller

Description: Altera 开发环境下的VGA控制源码，Verilog HDL语言编写，支持sopc环境下操作以及驱动-Altera development environment under the control of VGA source, Verilog HDL language to support the SOPC operating conditions, as well as drive
Platform: | Size: 49152 | Author: | Hits:

[Other] Verilog-PPT

Description: Verilog HDL语言的PPT教程。包括简介、逻辑概念、语法和示例。-Verilog HDL language tutorial PPT. Including profiles, the logic of concepts, syntax and examples.
Platform: | Size: 536576 | Author: 翟红光 | Hits:

[VHDL-FPGA-Verilog] simple_MCU

Description: 设计CPU方法及流程！VERILOG hdl-CPU design methods and processes! VERILOG hdl
Platform: | Size: 208896 | Author: 正中 | Hits:

[Other] PCI

Description: PCI设计指南The Xilinx LogiCORE PCI interface is a fully verified, pre-implemented PCI Bus interface. This interface is available in 32-bit and 64- bit versions, with support for multiple Xilinx FPGA device families. It is designed to support both Verilog-HDL and VHDL. The design examples in this book are provided in Verilog.-PCI Design Guide The Xilinx LogiCORE PCI interface is a fully verified, pre-implementedPCI Bus interface. This interface is available in 32-bit and 64-bit versions, with support for multiple Xilinx FPGA device families. Itis designed to support both Verilog-HDL and VHDL. The designexamples in this book are provided in Verilog.
Platform: | Size: 899072 | Author: lee | Hits:

[VHDL-FPGA-Verilog] verilog

Description: 北大微电子学系于敦山老师的课件，介绍Verilog HDL、Cadence Verilog仿真器、可综合的Verilog HDL、设计举例、自动布局布线工具、Verilog的词汇约定等内容-Department of Microelectronics, Peking University in the teacher s courseware mts on Verilog HDL, Cadence Verilog simulator can be integrated Verilog HDL, design, for example, automatic placement and routing tools, Verilog, etc. terms agreed
Platform: | Size: 1550336 | Author: 唐进 | Hits:

[VHDL-FPGA-Verilog] VerilogHDL

Description: VerilogHDL硬件描述语言(简单的Verilog HDL语法-VerilogHDL Hardware Description Language (Verilog HDL simple grammar
Platform: | Size: 4843520 | Author: 张丽滨 | Hits:

[VHDL-FPGA-Verilog] dul_ram(yk)

Description: 关于双口RAM的Verilog HDL源码-On the dual-port RAM in Verilog HDL source
Platform: | Size: 3072 | Author: 123 | Hits:

[VHDL-FPGA-Verilog] cordic

Description: cordic算法的Verilog HDL具体实现-CORDIC algorithm specific realize Verilog HDL
Platform: | Size: 7168 | Author: 王伟 | Hits:

[SCM] LCD_Driver

Description: LCD的驱动程序　用verilog HDL 编写　可以用于FPGA上　经过测试　可以使用-LCD driver with verilog HDL can be used for the preparation of the FPGA can be tested using
Platform: | Size: 2048 | Author: 德刚 | Hits:

[VHDL-FPGA-Verilog] SourceFile

Description: PS2鼠标实验Verilog HDL代码-PS2 mouse experiments Verilog HDL code
Platform: | Size: 4096 | Author: 张猛蛟 | Hits:
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