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该电路由AT89C51单片机，CD4511*3为BCD-七段锁存/译码/驱动器，LED共阴数码管，磁敏霍尔元件组成。
-The circuit from the AT89C51 single-chip, CD4511* 3 for the BCD-Seven-Segment Latch/Decoder/Driver, LED digital tube were negative, magnetic components敏霍尔.
Platform: |
Size: 4096 |
Author: ykyong918 |
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Description: 利用单片机通过锁存器实现四个数码管的显示,节省I/O口,给系统留下升级空间-Through the use of single-chip realization of the four latch digital tube display, saving I/O port for system upgrades to leave space
Platform: |
Size: 27648 |
Author: 盛 |
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Description: 数字抢答器（数字电路）【课程设计】数字抢答器由主体电路与扩展电路组成。优先编码电路、锁存器、译码电路将参赛队的输入信号在显示器上输出；用控制电路和主持人开关启动报警电路，以上两部分组成主体电路。通过定时电路和译码电路将秒脉冲产生的信号在显示器上输出实现计时功能，构成扩展电路。经过布线、焊接、调试等工作后数字抢答器成形。-Answer the number of devices (digital circuit) curriculum design】 【Answer is controlled by digital circuits and the expansion of the main circuit. Priority encoder circuit, latch, decoder circuit will be teams of the input signal in the display output with control circuitry and the host switch alarm circuits, and above the main circuit composed of two parts. Through the timing circuit and decoding circuit to generate pulse signals in the display output timing functions, constitute the expansion of the circuit. After wiring, welding, testing, etc. Answer the number of devices after the forming.
Platform: |
Size: 56320 |
Author: jdz |
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Description: 数字钟的设计【数字电子技术课程设计】 数字钟实际上是一个对标准频率-The figure vies for the answering device by the subject circuit and expands the circuit to make up . Have priority in code circuit , latch , decipher circuit and export the input signal of the entrant team on the display Starting the warning circuit with the control circuit and host s switch, two the above-mentioned parts make up the subject circuit. Through timing circuit and decipher second signal function while outputs and realizes counting on the displaying that pulse produce circuit, form and expand the circuit. Through connect up , weld , debug figure vie for answering device take shape after the work.
Platform: |
Size: 159744 |
Author: jdz |
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Description: 573的使用，如何使用锁存器，把一个接地，另外一个使能-573 use, how to use the latch to a ground, another one to enable
Platform: |
Size: 19456 |
Author: 范华 |
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Description: 一个DDS芯片AD9851的VERILOG程序，加74HC574锁存器！-A DDS chip AD9851' s VERILOG program, plus 74HC574 latch!
Platform: |
Size: 1024 |
Author: 陈枫 |
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Description: 单片机与74LS595(8位输出锁存移位寄存器)的使用方法
74595的数据端：
QA--QH: 八位并行输出端，可以直接控制数码管的8个段。
QH : 级联输出端。我将它接下一个595的SI端。
SI: 串行数据输入端
.........
-SCM and 74LS595 (8-bit output latch shift register) 74595 to use the data side: QA- QH: 8 parallel output can directly control the digital tube 8 segment. QH ' : Cascade output. I have added it took over a 595 end of the SI. SI: Serial data input .........
Platform: |
Size: 5120 |
Author: eric |
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Description: 了解锁存器在接口电路中的作用，学习带有锁存器的接口电路设计方法-Learn latch the role of the interface circuit to learn the interface with a latch circuit design method
Platform: |
Size: 173056 |
Author: 潘博 |
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Description: 595连级输出数据，138行驱动。P0_1为移动速度高速 点阵显示汉字程串口输出字符数据，P2口输出行扫描信号,P2_7输出595锁存信号。
-595 company-level output data, 138 line driver. P0_1 for mobile high speed dot-matrix display Chinese characters Cheng serial output character data, P2 port output line scanning signal, P2_7 output latch signal 595.
Platform: |
Size: 4096 |
Author: 谢统辉 |
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Description: 电路与程序分析:我们选用的是MCS51系列单片机74LS273 D锁存器 74LS32 或门电路 ，单片机做主控, 因为单片机的端口有限所以用74LS273做锁存 74LS32做脉冲分配-Circuit and program analysis: Our choices are the MCS51 series microcontrollers 74LS273 D latch 74LS32 OR gate circuit, the controlling microcomputer, because the port is limited microcontroller to do so with the 74LS273 latch 74LS32 do pulse distribution
Platform: |
Size: 248832 |
Author: 谢统辉 |
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Description: 16*16点阵代码，芯片为stc89c52rc，74hc573锁存数据。-16* 16 dot matrix code, chip stc89c52rc, 74hc573 latch the data.
Platform: |
Size: 1024 |
Author: lingjun |
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Description: 适用于8位动态扫描的串行传输-锁存的低有效LED驱动电路，程序根据Disp_Buf[LED_Num]内信息逐位更新LED显示,基于ZLG easy1138学习板-For 8-bit dynamic scan of the serial transmission- Latch LED driver circuit of low-effective, procedures, according to Disp_Buf [LED_Num] update the information in bit-LED display, based on ZLG easy1138 learning board
Platform: |
Size: 2048 |
Author: ken |
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Description: 实现代码，A、B为输入、Y为输出，它们为8位向量。OE为输出使能，低电平有效。IE为输入锁存时能，上升沿有效。Ci为进位输入，Co为进位输出。
S0、S1、S2为运算逻辑选择输入：
，用vhdl语言编写，基于数字电路。-Implementation code, A, B input, Y the output, they are 8-bit vector. OE to output enable, active low. IE when the input latch, rising edge and effective. Ci for the Carry input, Co to carry out. S0, S1, S2 for the arithmetic logic selection input: using vhdl language, based on digital circuits.
Platform: |
Size: 1024 |
Author: youruo |
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Description: DA转化模块0809是8位8通道逐次逼近式A/D转换器，CMOS工艺，可实现8路模拟信号的分时采集，片内有8路模拟选通开关，以及相应的通道地址锁存用译码电路，其转换时间为100us左右。
OCM12864 液晶显示模块是128×64 点阵型液晶显示模块，可显示各种字符及图形，可与CPU 直接接口，具有8 位标准数据总线、6 条控制线及电源线，采用KS0108 控制IC
-DA conversion module 0809 is an 8-bit 8-channel successive approximation type A/D converter, CMOS technology, can realize 8-channel analog signal acquisition time-sharing, on-chip 8-channel analog strobe switches, and the corresponding channel address latch with the decoding circuit, the conversion time is around 100us. OCM12864 liquid crystal display module is 128 × 64 points, formation liquid crystal display module can display a variety of characters and graphics can be a direct interface with the CPU, with 8-bit standard data bus, six control lines and power lines, with KS0108 Control IC
Platform: |
Size: 21504 |
Author: miugedeon |
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Description: 入门知识：当P0作为地址/数据总线使用时，在读指令码或输入数据前，CPU自动向P0口锁存器写入0FFH，破坏了P0口原来的状态。因此，不能再作为通用的I/O端口。大家以后在系统设计时务必注意，即程序中不能再含有以P0口作为操作数（包含源操作数和目的操作数）的指令。-When the P0 as the address/data bus when used in reading the script or the input data before, CPU automatically writes to the P0 port latch 0FFH, destroyed the port P0 original state. Therefore, no longer as a general-purpose I/O ports. After everyone in the system design is important to note that the program can no longer contain in order to P0 mouth as operands (including the source operand and destination operand) instructions.
Platform: |
Size: 805888 |
Author: CAIHONG |
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Description: 用数码管编的时钟程序，采用了数码管的动态显示，没有锁存器-Part of the clock with a digital control program, using the digital control of dynamic display, no latch
Platform: |
Size: 16384 |
Author: zhongweijia |
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Description: 这是一个4位的锁存器 一般适用于4位十进制计数器上-This is a 4-bit latch generally apply to 4-bit decimal counter
Platform: |
Size: 18432 |
Author: 朱迁虎 |
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Description: 本程序是通过74HC573锁存器控制八个数码管，给大家参考。-The program is controlled through the 74HC573 latch 8 digital tube, for your reference.
Platform: |
Size: 12288 |
Author: 朱先生 |
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Description: this Code is in verilog HDL.
This Code is for piplined processor with 4 opcode.
this will work in three cycle latch, decode and exicute..
test bench for xilinx ise is laos given
Platform: |
Size: 4096 |
Author: Yogesh PAtel |
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Description: 74hc575是一个锁存器，为8位数据。使用者可以通过串行输入数据控制。-74hc575 is a latch for the 8-bit data. Users can input data through the serial control.
Platform: |
Size: 604160 |
Author: 忆真 |
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