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[GDI-BitmapLatch

Description: 用LABVIEW8.0寫的拴鎖程式-Written by LABVIEW8.0 shuan lock program
Platform: | Size: 35840 | Author: 安安 | Hits:

[SCM74hc595

Description: 这里给出74hc595的c51驱动程序。带锁存功能的串入并出芯片。-Here are 74hc595 the C51 driver. With latch function and a string into the chip.
Platform: | Size: 1024 | Author: lzd | Hits:

[VHDL-FPGA-Verilogpinluji

Description: 四位十进制频率计设计 包含测频控制器(TESTCTL),4位锁存器(REG4B),十进制计数器(CNT10)的原程序(vhd),波形文件(wmf ),包装后的元件(bsf)。顶层原理图文件(Block1.bdf)和波形。 -Four decimal frequency meter measuring frequency controller design includes (TESTCTL), 4 bit latch (REG4B), decimal counter (CNT10) of the original procedure (vhd), waveform file (wmf), packaged components (bsf). Top-level schematic document (Block1.bdf) and waveform.
Platform: | Size: 11264 | Author: 深空 | Hits:

[SCMDISP

Description: STC单片机数码管测试程序,P4.0控制595时钟,P4.3控制595锁存,高有效, P4.1为LED 数据输入口-STC Single-chip digital tube test procedure, P4.0 control 595 clock, P4.3 control latch 595, high-effective, P4.1 input data for the LED
Platform: | Size: 18432 | Author: xiaohua | Hits:

[Embeded-SCM DevelopZXJLS

Description: 电力微机五防闭锁用的交流验电锁原理图,国内知名公司采用-Power Microcomputer five anti-latch-up inspection by the exchange of electric locking schematics, well-known companies
Platform: | Size: 2048 | Author: rokerwen | Hits:

[Other4luqiangdaqi

Description: 4路抢答器,具有锁存与声音和LED显示功能。-Answer 4-way, and has a latch with the sound and LED display.
Platform: | Size: 102400 | Author: 春晨 | Hits:

[DSP program74HC573_www.ic37.com

Description: The SL74HC573 is identical in pinout to the LS/ALS573. The device inputs are compatible with standard CMOS outputs with pullup resistors, they are compatible with LS/ALSTTL outputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. When Latch Enable goes low, data meeting the setup and hold time becomes latched.-The SL74HC573 is identical in pinout to the LS/ALS573. The deviceinputs are compatible with standard CMOS outputs with pullupresistors, they are compatible with LS/ALSTTL outputs.These latches appear transparent to data (ie, the outputs changeasynchronously) when Latch Enable is high . When Latch Enable goeslow, data meeting the setup and hold time becomes latched.
Platform: | Size: 44032 | Author: gainers | Hits:

[Other51MCUchangyongxinpianshouce

Description: 这是一个exe文件的速查手册,包括地址锁存器芯片,存储器扩展芯片,外部I/O口扩展,V/F转换等-This is an exe file Info manuals, including the address latch chip, memory expansion chips, external I/O port expansion, V/F conversion
Platform: | Size: 228352 | Author: jiecuiok | Hits:

[VHDL-FPGA-VerilogSCHK

Description: 实验图1是一含计数使能、异步复位和计数值并行预置功能4位加法计数器,例1是其VHDL描述。由实验图1所示,图中间是4位锁存器;rst是异步清信号,高电平有效;clk是锁存信号;-Figure 1 is a test with count enable, asynchronous reset and preset features include numerical parallel adder four counters, Example 1 is described in VHDL. By experiment shown in Figure 1, Figure 4 is the intermediate latch rst clearance signal is asynchronous, high effective clk is a latch signal
Platform: | Size: 3072 | Author: 刘阳 | Hits:

[Program docDigital_Responder(Digital_Circuit)

Description: 数字抢答器由主体电路与扩展电路组成。优先编码电路、锁存器、译码电路将参赛队的输入信号在显示器上输出;用控制电路和主持人开关启动报警电路,以上两部分组成主体电路。通过定时电路和译码电路将秒脉冲产生的信号在显示器上输出实现计时功能,构成扩展电路。经过布线、焊接、调试等工作后数字抢答器成形。-Answer the number is controlled by the main circuit and the expansion of circuit components. Priority encoder circuit, latch, decoder circuit will be teams of the input signal in the display output with control circuitry and the host switch alarm circuits, and above the main circuit is composed of two parts. Through the timing circuit and decoding circuit to generate pulse signals in the display output timing functions, constitute the expansion of the circuit. After wiring, welding, debugging, etc. Answer device forming after the figures.
Platform: | Size: 56320 | Author: 张堃 | Hits:

[VHDL-FPGA-VerilogVHDL-ROM4

Description: 基于ROM的正弦波发生器的设计:1.正弦发生器由波形数据存储模块(ROM),波形发生器控制模块及锁存模块组成 2.波形数据存储模块(ROM)定制数据宽度为8,地址宽度为6,可存储 64点正弦波形数据,用MATLAB求出波形数据。 3.将50MHz作为输入时钟。 -ROM-based design of the sine wave generator: 1. Sinusoidal waveform generator by the data storage module (ROM), waveform generator control module and latch module 2. Waveform data storage module (ROM) custom data width of 8 , address width of 6, can store 64 points sinusoidal waveform data, waveform data are obtained using MATLAB. 3. To 50MHz clock as input.
Platform: | Size: 98304 | Author: 宫逢源 | Hits:

[SCMd

Description: 8乘以8点陈显示,显示动态箭头案,74ls595锁存器和8位单片机 -8 multiplied by 8 o clock Chen revealed that show the dynamic arrow case, 74ls595 latch and 8-bit MCU
Platform: | Size: 29696 | Author: 笑眠眠 | Hits:

[Embeded-SCM Develop74HC573

Description: 74HC573 具有输出缓冲作用的8位锁存器-74HC573 output buffer latch 8
Platform: | Size: 169984 | Author: 额度爱 | Hits:

[SCMled-8zi

Description: /***************************************************** 16*128 LED点阵屏 C 程序 ****************************************************** 声明: 本程序供大家学习之用,用勿用于商业用途。尊重版权。 编写:邓椿薪 时间:2006年1月20日 晚 邮箱:love2151@xinhuanet.com ******************************************************* //595连级输出数据,138行驱动。P0_1为移动速度高速/*点阵显示汉字程串口输出字符数据, //P2口输出行扫描信号,P2_7输出595锁存信号。*/-/***************************************************** 16* 128 LED dot matrix screen C procedures****************************************************** Disclaimer: This procedure for everyone learning with not for commercial purposes. Respect for copyright. Preparation:邓椿pay time: in January 2006 the evening of 20 E-mail: love2151@xinhuanet.com*******************************************************// 595 Link-level output data, 138 line driver. High speed for mobile P0_1/* dot-matrix display Chinese characters-way serial output character data,// P2 port output line scanning signal, P2_7 latch 595 output signal.* /
Platform: | Size: 2048 | Author: kd911 | Hits:

[SCM6122decode

Description: 6122红外解码,并通过口线模拟IIC将键值推至164锁存器控制数码管静态显示-Infrared decoder 6122, and through the mouth-line simulation IIC will be key to a latch control 164 static digital tube display
Platform: | Size: 2048 | Author: dongxiao | Hits:

[Embeded-SCM Develop74ls373

Description: 373为三态输出的八D透明锁存器,共有54/74S373和54/74L373两种线路结构-373 for the three-state output of the eight D transparent latch, a total of two lines 54/74S373 and 54/74L373 structure
Platform: | Size: 100352 | Author: 钱俊 | Hits:

[Other Embeded programSKM_FireServiceInterface

Description: This an interface program for flip flop emulation. At first pulse at the input pin the apropriate output will latch and at the second pulse will release. Very short and efficient program-This is an interface program for flip flop emulation. At first pulse at the input pin the apropriate output will latch and at the second pulse will release. Very short and efficient program
Platform: | Size: 1024 | Author: ivica | Hits:

[SCM74HC595

Description: 7HC595系列锁存器的datasheet.内部有详细的管脚说明和程序应用举例-Latch the 7HC595 series datasheet. There are detailed instructions and procedures for the application of pins, for example
Platform: | Size: 112640 | Author: 葛健 | Hits:

[SCMa

Description: 多功能智能抢答器系统,8人抢答,具有定时,锁存功能-Answer multi-functional intelligent systems, 8 Answer, with timing, latch function
Platform: | Size: 3072 | Author: liyan | Hits:

[Embeded-SCM Develop0809chengxu

Description: AD0809程序,ADC0809 是8 位逐次逼近型A/D转换器。它由一个8路模拟开关、一个地址锁存译码   器、一个A/D 转换器和一个三态输出锁存器组成(见图1)。多路开关可选通8个模拟通道,   允许8 路模拟量分时输入,共用A/D 转换器进行转换。三态输出锁器用于锁存A/D 转换完   的数字量,当OE 端为高电平时,才可以从三态输出锁存器取走转换完的数据。-AD0809 procedures, ADC0809 is an 8-bit successive approximation type A/D converter. It consists of an 8-channel analog switch, a latch address decoder, an A/D converter and a three-state output latch components (see Figure 1). Optional multi-pass switches 8 analog channels, allowing the volume of time 8-channel analog input, sharing of A/D converter to convert. Three-state output latch lock is used A/D conversion of the digital end, when OE is high-end only when the output from the tri-state latch data taken after the conversion.
Platform: | Size: 129024 | Author: linmiao | Hits:
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