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[VHDL-FPGA-Verilog] alu

Description: verilog code for alu in RISC processor
Platform: | Size: 1024 | Author: John jose | Hits:

[VHDL-FPGA-Verilog] ALU

Description: 这是一个用vhdl语言实现的比较完整的ALU,可以用作其他cPU设计的部件-This is a vhdl language used to achieve complete ALU, can be used for other design components cPU
Platform: | Size: 195584 | Author: maxpayne | Hits:

[Windows Develop] ALU-FP

Description: ALU floating point 8 bit
Platform: | Size: 781312 | Author: nicola | Hits:

[VHDL-FPGA-Verilog] ALU

Description: ALU logic using Verilog
Platform: | Size: 1024 | Author: Cho Hyun Woo | Hits:

[VHDL-FPGA-Verilog] alu

Description: 这是32位alu的代码，使用verilog写的，包含了简单的运算功能-This is a 32-bit alu code, use verilog to write, and includes a simple arithmetic functions
Platform: | Size: 1024 | Author: 杨恋 | Hits:

[VHDL-FPGA-Verilog] alu

Description: 用Verilog编写的简单的运算单元（ALU），可实现加、减、与、或、异或、非、左、右移等功能-Verilog prepared with simple arithmetic unit (ALU), can be add, subtract, and, or, exclusive-OR, non-, left, and other functions shifted to right
Platform: | Size: 191488 | Author: wangzhen | Hits:

[Other] alu

Description: ALU modeling verilog codes and testbench
Platform: | Size: 545792 | Author: neorome | Hits:

[Software Engineering] ALU

Description: Write an 8085 ALP to design a 4-bit ALU. The ALU should be able to perform addition, subtraction, AND operation, OR operation on 4-bit inputs based on the desired operation
Platform: | Size: 1024 | Author: debojit | Hits:

[Other] ALU

Description: alu设计,实现三十二位计算，包括加法和减法，以及与，或，异或等-design of alu，alu design, implement 32, including both the addition and subtraction, as well as AND, OR, XOR, etc
Platform: | Size: 2048 | Author: xuyajun | Hits:

[Windows Develop] Alu-4bit

Description: alu 4 bit with verilog in modelsim and work correct
Platform: | Size: 41984 | Author: sara | Hits:

[Other] 8-alu

Description: 8-bit alu design...it has arithematic and shift operation-8-bit alu design...it has arithematic and shift operation....
Platform: | Size: 2048 | Author: awais | Hits:

[VHDL-FPGA-Verilog] ALU

Description: 这个是我的数字电路设计报告，利用了vhdl语言制作了一个n位的可配置alu器件，实现了一些基本的功能，附有完整的报告及代码，我没有对我的信息进行删除，是希望大家能够诚实的利用这个代码，提高自身本领。-This is my digital circuit design report, using the vhdl language produced an n-bit alu device can be configured to achieve some basic functions, with full report and the code, I did not delete my information is that the we can honestly take advantage of this code, to improve their own skills.
Platform: | Size: 1208320 | Author: de de | Hits:

[VHDL-FPGA-Verilog] ALU

Description: a simple 4 bit alu in verilog
Platform: | Size: 612352 | Author: priya | Hits:

[VHDL-FPGA-Verilog] ALU

Description: ALU与ALU控制器设计，verlog语言书写-ALU
Platform: | Size: 400384 | Author: 刘君 | Hits:

[VHDL-FPGA-Verilog] ALU

Description: this is a 4 bit alu design-this is a 4 bit alu design
Platform: | Size: 439296 | Author: waqas | Hits:

[VHDL-FPGA-Verilog] ALU

Description: 用VHDL硬件描述语言写的ALU设计，有加法，减法，乘法和除法等计算功能。-VHDL hardware description language used to write the ALU design, there are addition, subtraction, multiplication and division such as computing.
Platform: | Size: 3072 | Author: 飞翔 | Hits:

[VHDL-FPGA-Verilog] alu[1].eg1

Description: A 32-Bit ALU Design Example
Platform: | Size: 46080 | Author: vinoth | Hits:

[VHDL-FPGA-Verilog] alu

Description: VHDL实现的算术逻辑计算单元（ALU），包括modersim测试文件，即仿真结果。-VHDL implementation of the arithmetic logic calculation unit (ALU), including modersim test file, the simulation results.
Platform: | Size: 388096 | Author: pxjy | Hits:

[VHDL-FPGA-Verilog] alu

Description: This 8 bit unsigned arithematic logical unit(ALU). This code is developed in VHDL language and compatible with any VHDL softeware like xilinx,quartus. This ALU performs addition,subtraction,multiplication,and,or,and not and pass input functions.-This is 8 bit unsigned arithematic logical unit(ALU). This code is developed in VHDL language and compatible with any VHDL softeware like xilinx,quartus. This ALU performs addition,subtraction,multiplication,and,or,and not and pass input functions.
Platform: | Size: 94208 | Author: chunduru | Hits:

[VHDL-FPGA-Verilog] ALU

Description: verilog硬件仿真，实现32-bit RISC微处理器的算数逻辑单仿真元(ALU),实现加减运算、逻辑运算、移位运算。仿真级别为RTL级。-verilog hardware simulation, to achieve 32-bit RISC microprocessor arithmetic logic one simulation element (ALU), to achieve addition and subtraction operations, logic operations, shift operations. RTL-level simulation level.
Platform: | Size: 3072 | Author: | Hits:
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