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[VHDL-FPGA-Verilog] alu_16

Description: 三种16位整数运算器的ALU设计方法，调用库函数74181（4位ALU），组成串行16位运算器。(用74181的正逻辑) B．调用库函数74181和74182，组成提前进位16位运算器。(用74181的正逻辑) 注意：调74181库设计，加进位是“0”有效，减借位是“1”有效，所以最高位进位或借位标志寄存器要统一调整到高有效 C．用always @，case方式描述16位运算器。-Three 16-bit integer arithmetic logic unit of the ALU design methodology, called library function 74181 (4 ALU), composed of serial 16-bit arithmetic logic unit. (With 74,181 positive logic) B. Call library functions 74181 and 74182 to form the advance into the 16-bit arithmetic logic unit. (With 74,181 positive logic) Note: 74,181 Treasury tune the design, add bit is
Platform: | Size: 1024 | Author: yifang | Hits:

[Books] alu1

Description: ALU设计实现，有加法减法逻辑移位以及状态转换等-ALU design, there are additive and subtractive logic state transitions, such as translocation
Platform: | Size: 2048 | Author: wang | Hits:

[VHDL-FPGA-Verilog] ALU

Description: 此代码能高速实算术逻辑单元的功能，适合risc_CPU的设计。若有不足，请多多包含。-This code can be really high-speed arithmetic logic unit function, suitable for risc_CPU design. If insufficient, please contain.
Platform: | Size: 1024 | Author: 张朝阳 | Hits:

[ARM-PowerPC-ColdFire-MIPS] ALU_design

Description: 一个关于设计简单ALU的说明书，当中附有源代码，测试可行，同时效率比较高，算法也比较完善-A simple ALU design specification, which attached to the source code, test feasible, while more efficient, the algorithm is also relatively perfect
Platform: | Size: 318464 | Author: szx | Hits:

[Software Engineering] 07302529

Description: 计算机组成原理实验（MAX PLUS） 1.ALU设计 2.MEM设计 3.32位2选1选择器-Principles of Computer Organization Experiment (MAX PLUS) 1.ALU design 2.MEM design 3.32 2 election 1 selector
Platform: | Size: 244736 | Author: 翁浩达 | Hits:

[assembly language] alu

Description: 用汇编语言编写的运算器，能进行简单的的数理和逻辑运算-Prepared by using assembly language computing device that can perform simple mathematical and logical operations
Platform: | Size: 3072 | Author: jy | Hits:

[Other] ALU

Description: ALU加法器的设计，实现带进位的加法运算！-ALU adder design, the realization of the adder into the bit computing!
Platform: | Size: 35840 | Author: cgrcgh | Hits:

[Other] ALU

Description: 用veriloghdl写的alu程序，对初学者会有帮助。-Writing with veriloghdl the alu procedures will be helpful for beginners.
Platform: | Size: 920576 | Author: Blakeu | Hits:

[DSP program] scann

Description: this dsp program is about alu in blackfin processor-this dsp program is about alu in blackfin processor
Platform: | Size: 1024 | Author: buff_86 | Hits:

[Other systems] 4BIT_ALU

Description: this program performs the functonality of 4 bit alu
Platform: | Size: 193536 | Author: v.k.sreedhar | Hits:

[VHDL-FPGA-Verilog] alu

Description: 设计带进位算术逻辑运算单元，根据74LS181功能表，用Verilog HDL硬件描述语言编程实现ALU181的算术逻辑运算功能，编辑实验原理图，在算术逻辑单元原理图上，将其扩展为带进位的算术逻辑运算单元，对其进行编译，并设计波形对其进行仿真验证，最后下载验证-Design into the digital arithmetic logic operation unit, in accordance with menu 74LS181 with Verilog HDL hardware description language programming ALU181 function arithmetic logic operations, editing Experimental schematic diagram, in the Arithmetic Logic Unit schematic diagram on its expansion into the spaces for arithmetic logic operation unit, its compiler, and the design of their simulation waveforms, and finally download the verification
Platform: | Size: 667648 | Author: 623902748 | Hits:

[VHDL-FPGA-Verilog] alu_code_asif

Description: vhdl code for ALU.i think by reading his code..it will be very easy for you to design an Alu.
Platform: | Size: 28672 | Author: Ammad | Hits:

[VHDL-FPGA-Verilog] 4bitALU

Description: 4 bit ALU 设计功能仿真和门级仿真结果 -4 bit ALU
Platform: | Size: 104448 | Author: 吴涵 | Hits:

[VHDL-FPGA-Verilog] VHDL05

Description: ALU算术逻辑运算模块设计代码。内容简单。是个不错的代码，学习的人可以下载参阅。-ALU arithmetic logic operations module design code. Simple. Is not a bad code, people can download the study refer to.
Platform: | Size: 1024 | Author: yanyinhong | Hits:

[VHDL-FPGA-Verilog] ALU_ise10migration

Description: It s vhdl source code for 32 bit ALU.
Platform: | Size: 76800 | Author: Abhishek Baranwal | Hits:

[VHDL-FPGA-Verilog] alu

Description: 加法器FPGA 实现，精简，快速，高效，有仿真文件-adder base on FPGA ，verilog HDL
Platform: | Size: 1024 | Author: lijiaming | Hits:

[VHDL-FPGA-Verilog] myAddSub

Description: Verilog adder for alu develpment
Platform: | Size: 1024 | Author: ricardiito | Hits:

[VHDL-FPGA-Verilog] 4_Bit_Alu_vhdl

Description: Complete VHDL Code for a 4 BIT ALU PROJECT
Platform: | Size: 22528 | Author: jassu | Hits:

[VHDL-FPGA-Verilog] control_fsm_rtl.vhd

Description: ALU 有限状态机 ALU 有限状态机 ALU 有限状态机 ALU 有限状态机 ALU 有限状态机-ALU FSMALU FSMALU FSMALU FSMALU FSMALU FSMALU FSMALU FSM
Platform: | Size: 7168 | Author: 王俊龙 | Hits:

[VHDL-FPGA-Verilog] ALU

Description: VHDL实现cpu核心逻辑与运算单元模块的实现，完成4bit*4bit输入8bit输出的运算，可做加减乘除逻辑移位6种操作-the implementation of Arithmetic and logic unit based on VHDL, can do as the adder,subtractor,multiplier,divider,shifter and logic operation.
Platform: | Size: 619520 | Author: caolei | Hits:

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[VHDL-FPGA-Verilog] alu_16

[Books] alu1

[VHDL-FPGA-Verilog] ALU

[ARM-PowerPC-ColdFire-MIPS] ALU_design

[Software Engineering] 07302529

[assembly language] alu

[Other] ALU

[Other] ALU

[DSP program] scann

[Other systems] 4BIT_ALU

[VHDL-FPGA-Verilog] alu

[VHDL-FPGA-Verilog] alu_code_asif

[VHDL-FPGA-Verilog] 4bitALU

[VHDL-FPGA-Verilog] VHDL05

[VHDL-FPGA-Verilog] ALU_ise10migration

[VHDL-FPGA-Verilog] alu

[VHDL-FPGA-Verilog] myAddSub

[VHDL-FPGA-Verilog] 4_Bit_Alu_vhdl

[VHDL-FPGA-Verilog] control_fsm_rtl.vhd

[VHDL-FPGA-Verilog] ALU

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