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VHDL-FPGA-Verilog list
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this code show how to use Altium to coding LED Counter on FPGA-CPLD
Date : 2025-07-21 Size : 325kb User : fazel

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this code show how to use Altium to coding LED glow on FPGA-CPLD
Date : 2025-07-21 Size : 181kb User : fazel

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this code show how to use Altium to coding RS232 on FPGA-CPLD
Date : 2025-07-21 Size : 171kb User : fazel

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this code show to use Altium to coding 7 Segment BUS on FPGA-CPLD
Date : 2025-07-21 Size : 189kb User : fazel

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this code show to use Altium to coding Switch and LED on FPGA-CPLD
Date : 2025-07-21 Size : 72kb User : fazel

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this code show to use Altium to coding Relay and Switch and Beezer on FPGA-CPLD
Date : 2025-07-21 Size : 57kb User : fazel

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this code show to use Altium to coding Single 7 Segment on FPGA-CPLD
Date : 2025-07-21 Size : 101kb User : fazel

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Using VHDL, PLD design taxi billing system, using VHDL prepared Car billing system procedures, using MAX+PLUSII software as a development platform for the simulation program, designed and implemented to verify the taxi m
Date : 2025-07-21 Size : 541kb User : zhonga

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This file can use verilog language implementation of FPGA and computer serial port communication.
Date : 2025-07-21 Size : 2kb User : qiuxiaohui

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Light game based on FPGA, the whole project which includes keyboard control, SVGA and so on.
Date : 2025-07-21 Size : 19.57mb User : YGP

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verilog four state machine with asynchronous clear end and test vectors mealy-type state machine oh we
Date : 2025-07-21 Size : 308kb User : 普通场

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Function is a FIFO, first in first out! To avoid the cross clock domain metastable
Date : 2025-07-21 Size : 183kb User : zhusiwei
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