this code show to use Altium to coding Relay and Switch and Beezer on FPGA-CPLD

SW-BIZ-REL\Constraint1.Constraint
..........\History\Sheet1.~(1).SchDoc.Zip
..........\.......\Sheet1.~(2).SchDoc.Zip
..........\.......\SW-BIZ-REL.~(1).PrjFpg.Zip
..........\ProjectOutputs\Default - All Constraints\AND2N2S.EDN
..........\..............\.........................\Sheet1.VHD
..........\..............\.........................\Status Report.Txt
..........\..............\.........................\SW-BIZ-REL.bfl
..........\..............\.........................\sw-biz-rel.bld
..........\..............\.........................\SW-BIZ-REL.cmd
..........\..............\.........................\SW-BIZ-REL.edf
..........\..............\.........................\SW-BIZ-REL.FlwCmp
..........\..............\.........................\sw-biz-rel.gyd
..........\..............\.........................\SW-BIZ-REL.jed
..........\..............\.........................\sw-biz-rel.mfd
..........\..............\.........................\SW-BIZ-REL.mof
..........\..............\.........................\SW-BIZ-REL.mpf
..........\..............\.........................\sw-biz-rel.ngd
..........\..............\.........................\SW-BIZ-REL.npl
..........\..............\.........................\sw-biz-rel.pad
..........\..............\.........................\sw-biz-rel.pnx
..........\..............\.........................\sw-biz-rel.rpt
..........\..............\.........................\sw-biz-rel.svf
..........\..............\.........................\SW-BIZ-REL.SVFOUT
..........\..............\.........................\SW-BIZ-REL.ucf
..........\..............\.........................\sw-biz-rel.vm6
..........\..............\.........................\sw-biz-rel.xml
..........\..............\.........................\SW-BIZ-REL_BUILD.UCF
..........\..............\.........................\sw-biz-rel_build.xml
..........\..............\.........................\SW-BIZ-REL_CoreGen.txt
..........\..............\.........................\sw-biz-rel_pad.csv
..........\..............\.........................\SW-BIZ-REL_Synth.log
..........\..............\.........................\tmperr.err
..........\..............\.........................\_blf\SWMINUSBIZMINUSREL_body.blf
..........\..............\.........................\....\SWMINUSBIZMINUSREL_header.blf
..........\..............\.........................\_impactbatch.log
..........\..............\.........................\.ngo\AND2N2S.ngo
..........\..............\.........................\....\netlist.lst
..........\..............\.........................\....\sw-biz-rel.ngo
..........\..............\Sheet1.V
..........\Sheet1.SchDoc
..........\SW-BIZ-REL.PrjFpg
..........\SW-BIZ-REL.PrjFpgStructure
..........\ProjectOutputs\Default - All Constraints\_blf
..........\..............\.........................\_ngo
..........\..............\Default - All Constraints
..........\History
..........\ProjectOutputs
SW-BIZ-REL

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