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  • Category : VHDL-FPGA-Verilog
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  • Update : 2014-04-24
  • Size : 101kb
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  • Author :fa***
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Introduction - If you have any usage issues, please Google them yourself
this code show to use Altium to coding Single 7 Segment on FPGA-CPLD
Packet file list
(Preview for download)


SEG-1\Constraint1.Constraint
.....\Constraint1.ConstraintPreview
.....\History\Constraint1.~(1).Constraint.Zip
.....\.......\Constraint1.~(2).Constraint.Zip
.....\.......\Constraint1.~(3).Constraint.Zip
.....\.......\SEG.~(1).SchDoc.Zip
.....\.......\SEG.~(2).SchDoc.Zip
.....\.......\SEG.~(3).SchDoc.Zip
.....\.......\SEG.~(4).SchDoc.Zip
.....\.......\SEG.~(5).SchDoc.Zip
.....\.......\SEG.~(6).SchDoc.Zip
.....\.......\SEG.~(7).SchDoc.Zip
.....\.......\SEG1.~(1).PrjFpg.Zip
.....\.......\SEVEN.~(1).v.Zip
.....\.......\SEVEN.~(2).v.Zip
.....\ProjectOutputs\Default - All Constraints\SEG.V
.....\..............\.........................\SEG1.bfl
.....\..............\.........................\seg1.bld
.....\..............\.........................\SEG1.cmd
.....\..............\.........................\SEG1.edf
.....\..............\.........................\SEG1.FlwCmp
.....\..............\.........................\seg1.gyd
.....\..............\.........................\SEG1.jed
.....\..............\.........................\seg1.mfd
.....\..............\.........................\SEG1.mof
.....\..............\.........................\SEG1.mpf
.....\..............\.........................\seg1.ngd
.....\..............\.........................\SEG1.npl
.....\..............\.........................\seg1.pad
.....\..............\.........................\seg1.pnx
.....\..............\.........................\seg1.rpt
.....\..............\.........................\seg1.svf
.....\..............\.........................\SEG1.SVFOUT
.....\..............\.........................\SEG1.ucf
.....\..............\.........................\seg1.vm6
.....\..............\.........................\seg1.xml
.....\..............\.........................\SEG1.~.JED
.....\..............\.........................\SEG1.~.ngd
.....\..............\.........................\SEG1.~.SVF
.....\..............\.........................\SEG1.~.VM6
.....\..............\.........................\SEG1_BUILD.UCF
.....\..............\.........................\seg1_build.xml
.....\..............\.........................\SEG1_CoreGen.txt
.....\..............\.........................\seg1_pad.csv
.....\..............\.........................\SEG1_Synth.log
.....\..............\.........................\Status Report.Txt
.....\..............\.........................\tmperr.err
.....\..............\.........................\_blf\SEG1_body.blf
.....\..............\.........................\....\SEG1_header.blf
.....\..............\.........................\_impactbatch.log
.....\..............\.........................\.ngo\netlist.lst
.....\..............\.........................\....\seg1.ngo
.....\..............\SEG.V
.....\SEG.SchDoc
.....\SEG.SchDocPreview
.....\SEG1.PrjFpg
.....\SEG1.PrjFpgStructure
.....\SEVEN.v
.....\ProjectOutputs\Default - All Constraints\_blf
.....\..............\.........................\_ngo
.....\..............\Default - All Constraints
.....\History
.....\ProjectOutputs
SEG-1
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