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[Embeded-SCM Develop]  148个verilog hdl小程序（有很多testbench）——

Description: 148个verilog hdl小程序（有很多testbench）——.-148 Verilog HDL small programs (many testbench) from Part
Platform: | Size: 55296 | Author: 地方 | Hits:

[Applications] RS encoder(Verilog)

Description: RS编码的源代码使用Verilog在Xinloinx平台-RS coding using the source code in Verilog Xinloinx platform
Platform: | Size: 5120 | Author: 王锋 | Hits:

[Books] Verilog-Semantics

Description: Synthesizable Verilo---syntax and semantics一本很好的关于verilog可综合设计的参考书-Synthesizable Verilo--- syntax and semantics a good Verilog synthesis of the reference design
Platform: | Size: 299008 | Author: 肖磊 | Hits:

[Books] verilog reference guide

Description: 一本全面的verilog参考书-a comprehensive reference book Verilog
Platform: | Size: 203776 | Author: 肖磊 | Hits:

[Embeded-SCM Develop] verilog-clock

Description: 用verilog编写的多功能数字钟--Multifunctional digital clock written in verilog.
Platform: | Size: 1024 | Author: 李瑞 | Hits:

[Other Embeded program] Verilog源码14

Description: Verilog源码14.rar-Verilog source 14.rar
Platform: | Size: 9216 | Author: 请不要用公用帐号上载 | Hits:

[Embeded-SCM Develop] verilog基础知识

Description: verilog基础知识.rar--Basic knowledege of verilog.
Platform: | Size: 289792 | Author: 胡显辉 | Hits:

[Embeded-SCM Develop] Verilog硬件描述语言教程

Description: Verilog硬件描述语言教程.rar--Verilog hardware description language tutorial.
Platform: | Size: 4169728 | Author: 胡显辉 | Hits:

[Communication-Mobile] 曼彻斯特编解码Verilog代码

Description: 曼彻斯特编解码Verilog代码 .zip-Manchester codec Verilog code. Zip
Platform: | Size: 10240 | Author: 崔广辉 | Hits:

[Documents] 北航夏宇闻verilog讲稿ppt

Description: 北航夏宇闻verilog讲稿ppt-Northern Xia Wen Verilog script ppt
Platform: | Size: 510976 | Author: 陈平 | Hits:

[VHDL-FPGA-Verilog] Verilog HDL Examples

Description: verilog的入门级别的例子（转载）-Verilog entry-level examples (reproduced)
Platform: | Size: 87040 | Author: 周贤 | Hits:

[VHDL-FPGA-Verilog] Verilog 设计技巧

Description: 本文介绍了使用verilog语言进行硬件设计的一些基本技巧-This paper describes the use of Verilog hardware design language, the basic skills
Platform: | Size: 8192 | Author: 孙文福 | Hits:

[VHDL-FPGA-Verilog] Computer Architecture Handbook on Verilog HDL

Description: Computer Architecture Handbook on Verilog HDL
Platform: | Size: 66560 | Author: 路路 | Hits:

[Other Embeded program] 发一个基于ModelSim仿真的Verilog源代码包

Description: 发一个基于ModelSim仿真的Verilog源代码包-made a ModelSim simulation based on the Verilog source code
Platform: | Size: 74752 | Author: 阿乐 | Hits:

[Other Embeded program] Verilog 语法速查手册

Description: Verilog 语法速查手册，做成了一个页面形式，方便Verilog开发人员查询！-Verilog Grammar Check manual, it would be a one page form to facilitate the development of Verilog staff inquiries!
Platform: | Size: 24576 | Author: 飞扬 | Hits:

[VHDL-FPGA-Verilog] verilog实现ALU的源代码

Description: verilog实现ALU的源代码，并提供了一个详细的测试平台！-achieve ALU Verilog source code, and provide a detailed test platform!
Platform: | Size: 1024 | Author: 飞扬 | Hits:

[VHDL-FPGA-Verilog] Verilog&Vhdl混语言对SDRAM的控制源代码

Description: Verilog&Vhdl混语言对SDRAM的控制源代码，提供了很好的例子，顶层文件为sdrm.v！-VerilogVhdl mixed language SDRAM control of the source code, provided a good example of top-level documents sdrm.v!
Platform: | Size: 249856 | Author: 飞扬 | Hits:

[VHDL-FPGA-Verilog] 结合XILINXCPLD RS232通信(verilog)

Description: 结合XILINXCPLD所做的模拟RS232通信verilog源程序-XILINXCPLD combine the simulation RS232 communication Verilog source
Platform: | Size: 121856 | Author: 于飞 | Hits:

[VHDL-FPGA-Verilog] 能综合的YCrCb2RGB模块（verilog)_采用3级流水线

Description: 能综合的YCrCb2RGB模块（verilog)_采用3级流水线,用fpga做小数运算，还有就是流水线技术 -can YCrCb2RGB integrated module (Verilog) _ used three lines, they simply do with fractional arithmetic, there is pipelining technology
Platform: | Size: 1024 | Author: 于飞 | Hits:

[VHDL-FPGA-Verilog] verilog SDRAM core

Description: 我用过的verilog hdl写的SDRAM core源程序,经过测试应用-I used to write Verilog HDL source of SDRAM core, the test application
Platform: | Size: 27648 | Author: 于飞 | Hits:
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