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Description: Altera cyclone ep1c6对sram idt71系列的读写时序控制-Altera cyclone ep1c6 of sram idt71 series of read and write timing control
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Size: 389120 |
Author: wmy |
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Description: 51单片机用c语言实例
包括ad,da,lcd,ICcard,sram,wdt等许多程序-51 Single-chip using c language examples include ad, da, lcd, ICcard, sram, wdt, and many other procedures
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Size: 286720 |
Author: 曾祥林 |
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Description: DE2-SRAM-IP-CORE
需要开发ip core的朋友可以参考哦
~-DE2-SRAM-IP-CORE need to develop friends can ip core reference Oh ~
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Size: 1573888 |
Author: 张曦 |
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Description: 有關於EP2C的一些程序(EX:I2C,FLASH,IRDA,MUSIC,LED,LIGHT,SRAM,UART,PS2,SPI )-EP2C on some of the procedures (EX: I2C, FLASH, IRDA, MUSIC, LED, LIGHT, SRAM, UART, PS2, SPI)
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Size: 2994176 |
Author: 鄧志明 |
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Description: LF2407A上的外扩SRAM芯片的调试程序,需要CCS软件开发平台-LF2407A on foreign expansion SRAM chip debugger, the need for CCS Software Development Platform
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Size: 16384 |
Author: 话化 |
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Description: FPGA自FX2 slavefifo中读取数据,写入至SRAM-FPGA since FX2 slavefifo read data, write to the SRAM
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Size: 286720 |
Author: 郭伟 |
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Description: PLD自增读写SRAM,有好的参照作用,希望大家指点和帮助。-PLD by reading and writing since the SRAM, has reference to the role of good, I hope everyone pointing and help.
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Size: 20480 |
Author: 王明 |
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Description: LM3S系列ARM用GPIO模拟并行总线扩展32KB SRAM
PF0~PF7 D0~D7(数据总线)
PA0~PA7 A0~A7(地址总线低8位)
PB0~PB7 A8~A15(地址总线高8位)
PB7 /CE(片选)
PC4 /WE(写使能)
PC5 /OE(读使能)
32KB SRAM 映射在地址0x0000~0x4FFF之间
为了加快访问速度,软件上将采用寄存器方式进行操作
PB7原为/TRST功能,现在也解放出来作为地址线A15-ARM Series LM3S simulation using parallel bus GPIO expansion 32KB SRAM PF0 ~ PF7 D0 ~ D7 (Data Bus) PA0 ~ PA7 A0 ~ A7 (low address bus 8) PB0 ~ PB7 A8 ~ A15 (Address bus high 8 ) PB7/CE (chip select) PC4/WE (Write Enable) PC5/OE (read enable) 32KB SRAM mapped at address 0x0000 ~ 0x4FFF in order to speed up the access between the speed, the way software will be used to operate the register was PB7/TRST function, is also liberated as address line A15
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Size: 119808 |
Author: lsg |
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Description: 基于Avalon的SDRAM控制器IP核-Avalon SRAM Controller
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Size: 320512 |
Author: 涂登乾 |
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Description: sram读模块基于FPGA的实现 verilog源代码-sram
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Size: 1024 |
Author: zhongjian |
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Description: sram 控制器的三种实现方案,来自xinlix工程师之手,不可多得-sram controller implementation of the three programs, from the hands of engineers xinlix, rare
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Size: 6144 |
Author: 刘太联 |
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Description: ccs下用来测试davinci板子的led模块的工程-ccs under davinci board used to test the led module works
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Size: 80896 |
Author: sarah.tang |
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Description: 双串口收发多串口收发,单片机间的通信,实现很多的功能-Dual serial multi-transceiver serial port transceiver, single-chip communication to achieve a lot of features
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Size: 3072 |
Author: ivan |
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Description: 在altera FPGA ep3c25器件上实现niosii+sram+flash-Altera FPGA ep3c25 in devices to achieve niosii+ sram+ flash
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Size: 17807360 |
Author: billfeng |
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Description: altera fpga ep3c25器件微处理器开发,niosii+sram, 已编译通过,可直接下载到开发板-altera fpga ep3c25 the development of microprocessor devices, niosii+ sram, compiled through, can be directly downloaded to the development board
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Size: 15242240 |
Author: billfeng |
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Description: avrC语言
全局和局部变量
• 全局变量
– 在 startup 初始化
– 存储于 SRAM
– 必须加载到寄存器堆中
• 局部变量
– 在函数初期初始化
– 存储于寄存器当中直至函数结束-awqvrCyuyan]
全局和局部变量
• 全局变量
– 在 startup 初始化
– 存储于 SRAM
– 必须加载到寄存器堆中
• 局部变量
– 在函数初期初始化
– 存储于寄存器当中直至函数结束
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Size: 1104896 |
Author: JIM |
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Description: FPGA编程方法介绍,方便学习VHDL,公供大家参考-fpga programe medoth, study hardware vhdl language
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Size: 2048 |
Author: richardz |
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Description: SRAM IS61LVC12824,读写控制程序,用CPLD 95216设计-SRAM IS61LVC12824, read and write control procedures, with the design of CPLD 95216
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Size: 1024 |
Author: watson |
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Description: 利用sram技术设计的一个FIFO-failed to translate
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Size: 19456 |
Author: jiangp |
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Description: 基于FPGA的数字存储示波器,用VHDL实现的,压缩包里是Quartus工程。AD采样送进FPGA,存入SRAM后用DA在普通示波器上可以显示。-FPGA-based digital storage oscilloscope, using VHDL achieved compression is Quartus project bag. AD sample into FPGA, after SRAM into DA in ordinary oscilloscope can display.
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Size: 61440 |
Author: deadtomb |
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