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Description: A design on a DE270 FPGA with the use of CCD: a camera DC2 and a TRDB LTM after reading from the SRAM.
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Size: 3850240 |
Author: Mouna |
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Description: A file showing a SRAM controller with a component that could make some image treatment
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Size: 3072 |
Author: Mouna |
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Description: SRAM模块功能描述,扩展运用外部存储器实现其他功能时可选用-SRAM module functional description, extended the use of external memory for other functions, i.e.
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Size: 1024 |
Author: zheshu |
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Description: 图像采集、存储控制verilog源代码,fpga控制SAA1117,采集数据存储到sram,仿真编译测试都能通过-Image acquisition, storage, control verilog source code, fpga control SAA1117, collecting data to sram, simulation tests can be compiled by
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Size: 25600 |
Author: 蹇清平 |
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Description: SRAM的读写代码,对SRAM进行了乒乓操作,用VHDL语言进行设计,很有参考价值,甚至可以直接复制代码来进行自己的设计-SRAM read and write code, ping-pong operation carried out on the SRAM, using VHDL language design, of great reference value, or even directly copy the code to carry out their own designs
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Size: 198656 |
Author: hongliang |
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Description: sram controler is for you
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Size: 15562752 |
Author: chenjunrui |
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Description: verilog code that can implemented on ACEX1k
FPGA for a SRAM-verilog code that can implemented on ACEX1k
FPGA for a SRAM
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Size: 221184 |
Author: z |
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Description: 简要介绍:
主要芯片:
CPU:ATmega128L
SRAM:SR61L256BS-8
CPLD:XILINX XC95144XL
SFLASH:AT45DB081B
ETHERNET:CS8900A
USB:PDIUSBD12
LCD:122x32 LMC62_095_M
POWER:LM2596S-3.3
RS232:MAX3232
软件:RS232,SRAM,CPLD调试通过,uCosII可以运行,ethernet部分没有完成,usb完成了一部分。 -HD MP3 USE MEGA128
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Size: 11170816 |
Author: shi |
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Description: This source use to display a 256x256 RGB image from SRAM on a CRT monitor.You can use this to filter colors of the image.Image is loaded into SRAM by using DE2_control_panel
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Size: 2395136 |
Author: lenam |
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Description: AMBA 2.0 APB Example- SRAM -AMBA 2.0 APB Example- SRAM
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Size: 1024 |
Author: Henry |
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Description: sram vhdl code. Very helpful
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Size: 7168 |
Author: usbfpga |
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Description: VHDL Code for SRAM Control
(Synthesized with Synplify-Pro, Active-HDL Simulation)
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Size: 82944 |
Author: DongHee Kim |
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Description: verilog编写的读写SRAM的源码,包括sram的读写控制-SRAM read and write verilog source code written in, including the sram to read and write control
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Size: 1024 |
Author: haha |
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Description: verilog编写的读写fifo的源码,包括sram的读写控制-verilog source code written to read and write fifo, including the sram to read and write control
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Size: 176128 |
Author: haha |
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Description: the avalon verilog slave sram interface fron be micron
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Size: 2048 |
Author: praveen |
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Description: 单片机写双口RAM,包括读写是否一致的自动检测-Microcontroller to write dual-port RAM, including the automatic detection of the consistency of read and write
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Size: 2048 |
Author: 孙殿举 |
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Description: Sycronous SRAM in CPLD or FPGA module...
tested by Altera MaxPlusII or Quatus -Sycronous SRAM in CPLD or FPGA module...
tested by Altera MaxPlusII or Quatus II
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Size: 1024 |
Author: hanhyunjin |
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Description: SRAM 读写VERILOG HDL源码-SRAM read and write VERILOG HDL source code
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Size: 2492416 |
Author: 杨先生 |
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Description: RTL Code for Design of Extarnal Memory Controller for Accessing Asynchronous SRAM of size 512Kx16
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Size: 5120 |
Author: Embedded_techie |
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Description: Huge set of Integrated Sillicium Solution Inc (ISSC) datasheets. Includes synchronous/asynchronous SRAM, DRAM, serial EEPROM, MCU, serial/parallel flash, and a whole bunch of other stuff.
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Size: 21065728 |
Author: Bubby |
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