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[Other] zbt_vhdl_xilinx

Description: SRAM控制器可以实现SRAM数据的输出控制-SRAM controller can realize SRAM data output control
Platform: | Size: 9216 | Author: bobo | Hits:

[Software Engineering] FPGA_SDR_Sdram_LED

Description: 针对主控制板上存储器(SRAM) 存储的数据量小和最高频率低的情况,提出了基于SDR Sdram(同步动态RAM) 作为主存储器的LED 显示系统的研究。在实验中,使用了现场可编程门阵列( FPGA) 来实现各模块的逻辑功能。最终实现了对L ED 显示屏的控制,并且一块主控制板最大限度的控制了256 ×128 个像素点,基于相同条件,比静态内存控制的面积大了一倍,验证了动态内存核[7 ]的实用性。-For the main control board memory (SRAM) a small amount of stored data and the highest frequency of low, based on SDR Sdram (Synchronous Dynamic RAM) as the main memory of the LED display systems. In the experiment, the use of field programmable gate array (FPGA) to realize the logic function of each module. The eventual realization of L ED display control, and a master control panel to maximize the control of the 256 × 128 pixels point, based on the same conditions than the static memory control area has doubled, to verify the dynamic memory of nuclear [7 ] the practicality.
Platform: | Size: 510976 | Author: 郑宏超 | Hits:

[VHDL-FPGA-Verilog] sram_control

Description: verilog编写fpga与片外SRAM通信模块-Verilog FPGA with the preparation of SRAM chip communication module
Platform: | Size: 418816 | Author: 宇天 | Hits:

[USB develop] logic

Description: SRAM和USB芯片FT245的VERILOG逻辑控制-USB chip SRAM and logic control VERILOG the FT245
Platform: | Size: 2048 | Author: zly | Hits:

[VHDL-FPGA-Verilog] DEMO1_KEY_LED

Description: KX_DVP3F型FPGA应用板/开发板（全套）包括：  CycloneII系列FPGA EP2C8Q208C8 40万们，含20M-270MHz锁相环2个。  RS232串行接口；VGA视频口  高速SRAM 512KB。可用于语音处理，NiosII运行等。  配置Flash EPCS2， 10万次烧写周期。  isp单片机T89S8253：MCS51兼容单片机，12KB在系统可编程Flash ROM，10万次烧写周期；2KB在系统可编程EEPROM，10万次烧写周期；2.7V-5.5V工作电压；0-24MHz 工作时钟；  2数码管显示器、20MHz时钟源（可通过FPGA中的锁相环倍频）；  液晶显示屏（20字X4行）；  工作电源5V、3.3V、1.2V混合电压源，良好电磁兼容性主板。  配套示例程序、资料、编程软件光盘等。  4X4键盘，4普通按键，8可锁按键，8发光管  BlasterMV编程下载器和并口通信线，可完成FPGA编程下载和isp单片机的编程。KX_DV3F开发板的源程序-err
Platform: | Size: 360448 | Author: ldg | Hits:

[VHDL-FPGA-Verilog] SRAM_16Bit_512K

Description: Verilog 编写的IP核，512K的16位SRAM-Written in Verilog IP core, 512K 16-bit SRAM
Platform: | Size: 11264 | Author: zhyy | Hits:

[SCM] 6264.ok

Description: at89c51 读取写入 6264 sram 的源代码-6264 sram write AT89C51 read the source code
Platform: | Size: 36864 | Author: lileyear | Hits:

[VHDL-FPGA-Verilog] SRAM_16Bit_512K

Description: 一个sram的源码程序，它是256kbx16bit的sram-An SRAM of the source program, it is the SRAM 256kbx16bit
Platform: | Size: 11264 | Author: chenyizhong | Hits:

[VHDL-FPGA-Verilog] SRAMtest

Description: FPGA的SRAM存储器的控制程序，包括时序测试-FPGA
Platform: | Size: 666624 | Author: | Hits:

[VHDL-FPGA-Verilog] SRAMinterface

Description: FPGA控制的SRAM接口不分的设计-FPGA-controlled SRAM interface design, regardless of
Platform: | Size: 1395712 | Author: | Hits:

[VHDL-FPGA-Verilog] de2_SRAM

Description: 使用FPGA控制SRAM的源代码，Verilog语言编写-脢鹿脫脙FPGA 驴脴脰脝SRAM渭脛脭
Platform: | Size: 92160 | Author: zw | Hits:

[VHDL-FPGA-Verilog] pro035

Description: verilog 编写基于SRAM(CY7C1041)的代码-Verilog prepared based on the SRAM (CY7C1041) code
Platform: | Size: 888832 | Author: wb | Hits:

[ARM-PowerPC-ColdFire-MIPS] YL_LPC229X_Test

Description: LPC2294 测试程序 YL_LPC229X_Test_Data的目录说明， DebugInChipSRAM:该目录在工程里对应target（DebugInChipSRAM)，用来在内部SRAM调试 DebugInExram: 该目录在工程里对应target（DebugInExram),用来在外部SRAM调试 Ext_Flash_bin:该目录在工程里对应target（Ext_Flash_bin),在该目录下生成可以烧写到外部Flash运行的代码。 Int_Flash_Hex:该目录在工程里对应target（Int_Flash_HEX),在该目录下生成可以烧写到内部Flash运行的代码。-LPC2294 testing procedures note YL_LPC229X_Test_Data directory, DebugInChipSRAM: the directory in the project in the corresponding target (DebugInChipSRAM), used in the internal SRAM debug DebugInExram: the directory in the project in the corresponding target (DebugInExram), used in the external SRAM debug Ext_Flash_bin: the directory in engineering in the corresponding target (Ext_Flash_bin), in the directory can be generated to the external Flash programmer to run code. Int_Flash_Hex: the directory in the project in the corresponding target (Int_Flash_HEX), in the directory can generate internal Flash programmer to run code.
Platform: | Size: 653312 | Author: blueesnail | Hits:

[VHDL-FPGA-Verilog] ref-sdr-sdram-verilog

Description: SDRAM的vegilog代码，做一个SDRAM的封装成为SRAM一样进行操作。一个顶层文件下由三个模块-SDRAM
Platform: | Size: 717824 | Author: 吴厚航 | Hits:

[DSP program] src

Description: TI28xDSP，SRAM内存数据访问源码文件。-TI28xDSP, SRAM memory data access source files.
Platform: | Size: 6144 | Author: Duis | Hits:

[assembly language] led+SRAMA1

Description: AT89C58单片机的外部SRAM检测数码管显示汇编语言编写-AT89C58 single-chip external SRAM testing digital tube display compiled languages
Platform: | Size: 4096 | Author: chengpeng | Hits:

[Embeded-SCM Develop] sls_sram_16_bit

Description: altera NIOS软核系统中构建外接SRAM接口的例子-altera NIOS soft-core system to build external SRAM interface example
Platform: | Size: 3072 | Author: 黄杰 | Hits:

[VHDL-FPGA-Verilog] Verilog_SRAM

Description: 使用Verilog写的SRAM的控制程序，仅供参考！-The use of the SRAM write Verilog the control procedures, for reference purposes only!
Platform: | Size: 2048 | Author: yangyu | Hits:

[VHDL-FPGA-Verilog] 71V416_Verilog_95461

Description: SRAM IDT71V416的VerilogHDL仿真模型源码文件-SRAM IDT71V416 simulation model of the source document VerilogHDL
Platform: | Size: 40960 | Author: 李云 | Hits:

[SCM] LPC2220_BOOTLOAD_UART_

Description: MCU为LPC2220,FLASH为39FV1601（地址0x80000000）,外部一个SRAM（地址0x81000000），程序用ADS编译，用分散加载，程序0x80000000开始引导，FLASH操作在LPC2220内部RAM运行。实现的作用为开机等待2秒左右若PC发来连接指令将进入BOOT部分，若超时则COPY应用程序到外部RAM开始运行。抛砖引玉，可以认识到分散加载，BOOT的基本原理及方法，该程序已可完成所有功能，但可能仍然需要补足一些如FLASH坏区检查等，不足之处，敬请自己修改过来拉。用于串口方式下载，波特率38400。-MCU for the LPC2220, FLASH for 39FV1601 (address 0x80000000), an external SRAM (address 0x81000000), program compiled using ADS, with scattered load, procedures 0x80000000 started guide, FLASH operating in the LPC2220 internal RAM to run. The realization of the role of waiting for the boot for about two seconds to connect if the PC-fat BOOT command will enter a part, if the overtime is COPY application to the external RAM is running. Initiate realize decentralized load, BOOT basic principles and methods, the program has to be completed by all the features, but it may still need to make up for some areas such as FLASH bad checks, the inadequacy of your own modifications pull over. For serial download, 38400 baud rate.
Platform: | Size: 185344 | Author: 高颖峰 | Hits:

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[Other] zbt_vhdl_xilinx

[Software Engineering] FPGA_SDR_Sdram_LED

[VHDL-FPGA-Verilog] sram_control

[USB develop] logic

[VHDL-FPGA-Verilog] DEMO1_KEY_LED

[VHDL-FPGA-Verilog] SRAM_16Bit_512K

[SCM] 6264.ok

[VHDL-FPGA-Verilog] SRAM_16Bit_512K

[VHDL-FPGA-Verilog] SRAMtest

[VHDL-FPGA-Verilog] SRAMinterface

[VHDL-FPGA-Verilog] de2_SRAM

[VHDL-FPGA-Verilog] pro035

[ARM-PowerPC-ColdFire-MIPS] YL_LPC229X_Test

[VHDL-FPGA-Verilog] ref-sdr-sdram-verilog

[DSP program] src

[assembly language] led+SRAMA1

[Embeded-SCM Develop] sls_sram_16_bit

[VHDL-FPGA-Verilog] Verilog_SRAM

[VHDL-FPGA-Verilog] 71V416_Verilog_95461

[SCM] LPC2220_BOOTLOAD_UART_

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