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[Documents] pll

Description: pll matlab程序~~对于系统级别的pll仿真很好-The matlab program of pll
Platform: | Size: 722944 | Author: louwf | Hits:

[DSP program] PLL

Description: 概述PLL的工作原理及完成一个简单的例子.-PLL principle outlined in the job and complete a simple example.
Platform: | Size: 94208 | Author: 孙永超 | Hits:

[matlab] PLL

Description: 基于matlab的锁相环（PLL）仿真源代码-Matlab based on the phase-locked loop (PLL) simulation source code
Platform: | Size: 1024 | Author: liuying | Hits:

[VHDL-FPGA-Verilog] PLL

Description: PLL是数字锁相环设计源程序, 其中, Fi是输入频率(接收数据), Fo(Q5)是本地输出频率. 目的是从输入数据中提取时钟信号(Q5), 其频率与数据速率一致, 时钟上升沿锁定在数据的上升和下降沿上； 顶层文件是PLL.GDF-Digital phase-locked loop PLL is the design source code, which, Fi is the input frequency (receive data), Fo (Q5) is a local output frequency. The purpose is to extract data from the input clock signal (Q5), their frequency and data rate in line clock rising edge of lock-in data on rising and falling edge PLL.GDF top-level document
Platform: | Size: 126976 | Author: 许伟 | Hits:

[matlab] pll

Description: 设计的软件锁相环的例子，自己写的，根据原理编的-PLL design example of software that he wrote, according to the principle for the
Platform: | Size: 2048 | Author: zhouxiaoshu | Hits:

[Communication-Mobile] pll

Description: 一个实现任意倍频的，输入参考频率未知的pll，已综合实现-frequency multiple rely on dpll，unknown reference input clock
Platform: | Size: 4096 | Author: 刘彻 | Hits:

[matlab] pll

Description: A Matlab script to simulate a Phase-Locked Loop (PLL). This is a type II PLL ie it has two integrators (one of these is the VCO itself). It is simulated with an FM (frequency modulation) input. The output is the demodulated baseband signal
Platform: | Size: 1024 | Author: Tom_M | Hits:

[SCM] pll

Description: 频合锁相环LMX2326与单片机接口代码 -LMX2326 PLL frequency together with the single-chip interface code
Platform: | Size: 1024 | Author: haoluoye | Hits:

[VHDL-FPGA-Verilog] pll

Description: 用VERILOG语言实现的数字锁相环P-VERILOG language with the digital phase-locked loop PLL
Platform: | Size: 384000 | Author: 叶少朋 | Hits:

[Communication-Mobile] PLL

Description: 锁相环路的基本工作原理 PLL basic working principal-The basic working principle of PLL PLL basic working principal
Platform: | Size: 3432448 | Author: Frank | Hits:

[SCM] PLL

Description: 该程序是基于c8051f120单片机开发的、关于使用其内部锁相环为系统时钟。比较适合于初学者-The program is based on c8051f120 MCU developed on the use of its internal PLL for system clock. More suitable for beginners
Platform: | Size: 1024 | Author: 马腾 | Hits:

[VHDL-FPGA-Verilog] pll

Description: 实现了pll功能，有利于初学者学习pll，采用文本编辑的，利用quartus ii 设计的-Achieved pll function, help beginners learn pll, using a text editor, using quartus ii Design
Platform: | Size: 216064 | Author: ad | Hits:

[Other] PLL

Description: LM3236锁相环程序设计-LM3236 PLL program design
Platform: | Size: 82944 | Author: xusong | Hits:

[matlab] pll

Description: 一個基本的鎖相迴路設計(PLL)simulink 程序-A basic phase-locked loop design (PLL) simulink program
Platform: | Size: 9216 | Author: 劉家源 | Hits:

[Windows Develop] PLL(lin)

Description: 锁相环的设计主要用于载波跟踪代码，在载波跟踪捕获当中可能会用到的源代码-PLL design is mainly used for carrier tracking code, the carrier capture which may be used to track the source code
Platform: | Size: 1024 | Author: 小孙 | Hits:

[matlab] PLL

Description: 調頻鑒頻的二階鎖相環，作圖得出環路濾波器幅頻響應曲綫和PLL線性相位模型的閉環響應曲綫。-PLL
Platform: | Size: 1024 | Author: sharon | Hits:

[matlab] pll-matlab

Description: 通信常用锁相环仿真－matlab格式－有简单注释。-Communications Common PLL simulation-matlab format- a simple comment.
Platform: | Size: 1024 | Author: 纪晓岚 | Hits:

[DSP program] PLL

Description: TMS320F2812DSP芯片的pll滤波器的设计，适用于用于pll设计的DSP初学者-TMS320F2812DSP chip pll filter design for FIR filter design for DSP beginners
Platform: | Size: 128000 | Author: scssncsss | Hits:

[Other] PLL

Description: simulink 仿真锁相环的一个pdf-a pdf of pll using simulink
Platform: | Size: 4389888 | Author: Edison | Hits:

[matlab] PLL

Description: 利用锁相环，比较好的实现了载波同步-PLL
Platform: | Size: 9216 | Author: xiaobo | Hits:
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