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[AI-NN-PR] PLL

Description: 分享一个PLL的pscad程序，用pscad自己实现的-PLL-pscad share a program, implemented with pscad own
Platform: | Size: 2048 | Author: 程帆远 | Hits:

[matlab] PLL

Description: matlab中锁相环（PLL）的仿真...功能完好-matlab in the phase-locked loop (PLL) simulation function well ...
Platform: | Size: 7168 | Author: 李强 | Hits:

[Software Engineering] PLL(pdf)

Description: 锁相环的设计方法介绍（PLL），可作为设计的参考。-Design method for PLL (PLL), can be used as a reference design.
Platform: | Size: 73728 | Author: 李强 | Hits:

[SCM] PLL

Description: 该程序实现了飞利浦嵌入式处理器LPC23XX的PLL设置具体程序例子，对工业控制是很好的参考。-The program implements the PLL Philips embedded processor LPC23XX specific procedures set an example for industrial control is a good reference.
Platform: | Size: 82944 | Author: 流沙 | Hits:

[Crack Hack] pll

Description: Digital PLL design, all technic how to develope eficiency digital locked loop. All descriptions in English in details and examples
Platform: | Size: 112640 | Author: bugsmenow | Hits:

[VHDL-FPGA-Verilog] PLL

Description: 基于FPGa实现一个数字锁相环，实现时钟恢复，具有较好的通用性。-pll
Platform: | Size: 1024 | Author: 高星 | Hits:

[Other] pll

Description: 锁相环经典书籍电子版，张厥盛。非常有用的经典教材-PLL electronic version of the classic book, Zhang Jue Sheng. Classic textbook very useful
Platform: | Size: 7237632 | Author: 熊志珲 | Hits:

[matlab] pll

Description: pll simulink model. noise and system model
Platform: | Size: 1501184 | Author: khosro raja | Hits:

[DSP program] PLL-config

Description: method of program pll in dsp -method of program pll in dsp 55xx
Platform: | Size: 12288 | Author: mostafa | Hits:

[matlab] PLL

Description: 锁相环simulink源码,难得的好代码，不要错过！-PLL simulink sourcecode is a good program,please download now!
Platform: | Size: 7168 | Author: brett | Hits:

[VHDL-FPGA-Verilog] PLL.ZIP

Description: the code specifies how to model a pll using vhdl code
Platform: | Size: 6144 | Author: mridula | Hits:

[VHDL-FPGA-Verilog] Noise-on-the-PLL-loop-bandwidth

Description: 一篇介绍的比较详细的关于锁相环噪声与环路带宽的文档-Noise on the PLL loop bandwidth of the document
Platform: | Size: 225280 | Author: 肖飞 | Hits:

[matlab] pll

Description: Analysis and design a P-Analysis and design a PLL
Platform: | Size: 5120 | Author: patrick | Hits:

[VHDL-FPGA-Verilog] PLL

Description: Phase locked loop(PLL) Verilog HDL code
Platform: | Size: 20480 | Author: hr | Hits:

[matlab] pll

Description: 用matlab模拟仿真锁相环，一个很好的程序，希望能帮到你-PLL with matlab simulation, a very good program, hope you can help
Platform: | Size: 1024 | Author: 偶轩昂亲 | Hits:

[AI-NN-PR] An-example--PLL-simulation

Description: This what I found on internet, it s a simulink program from different kinds of P-This is what I found on internet, it s a simulink program from different kinds of PLL
Platform: | Size: 385024 | Author: Yue Ma | Hits:

[VHDL-FPGA-Verilog] PLL

Description: 该测试程序用过Verilog HDL实现对PLL的分频，既频率管理功能-The Verilog HDL test procedure used to achieve the sub PLL frequency, only the frequency management function
Platform: | Size: 3072 | Author: Henin Lu | Hits:

[VHDL-FPGA-Verilog] pll

Description: 由锁相环改变时钟，希望能帮助到大家，同时也希望大家多指教-Changed by the PLL clock, hoping to help to you, but I hope you teach more
Platform: | Size: 409600 | Author: fengyang | Hits:

[VHDL-FPGA-Verilog] pll(FPGA)

Description: 利用VHDL语言对FPGA进行锁相环倍频，经调试已经在开发板上实现倍频-The FPGA using VHDL language PLL frequency multiplier, the debug board has been achieved in the development of frequency
Platform: | Size: 361472 | Author: huangshaobo | Hits:

[matlab] PLL

Description: 锁相环通信系统仿真 包括预处理，仿真引擎，以及后处理-PLL communication system simulation including pre-processing, simulation engines, and post-processing
Platform: | Size: 2048 | Author: yichen | Hits:
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