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Description: Dean 的PLL Performance,Simulation and Design 这本书里实例matlab程序-Dean of the PLL Performance, Simulation and Design This book PLL filter matlab program to solve the
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Size: 2048 |
Author: 王鹏 |
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Description: 现代通信系统仿真中锁相环仿真的PLL前处理程序-Modern communication systems simulation of the PLL phase-locked loop simulation procedures before
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Size: 1024 |
Author: 白文捷 |
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Description: 现在通信系统仿真中的锁相环技术,给出仿真程序以及后处理-Communication system simulation is now PLL technology, the simulation process and post-processing
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Size: 1024 |
Author: 白文捷 |
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Description: phase lock loop pll toolbox tool
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Size: 2048 |
Author: eux2 |
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Description: LPC2134控制PLL器件RF2052,可以读写RF2052寄存器,并设置频点-LPC2134 controlled PLL device RF2052, RF2052 can read and write registers, and set the frequency
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Size: 115712 |
Author: |
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Description: 总共包括7个实验,SRRAM测试,按键及PIO口中断实验,定时器实验,seg7实验,sopc_led实验,FLASH少些,FPGA_led,锁相环。-Including a total of 7 experiments, SRRAM test, test buttons and PIO port interrupt, timer experiment, seg7 experiment, sopc_led experiment, FLASH less, FPGA_led, PLL.
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Size: 3243008 |
Author: Air |
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Description: FPGA实现七个实验的源程序。SDRAM测试,按键及PIO口中断实验,定时器实验,seg7实验,sopc_led实验,flash烧写,fpga_led,锁相环。-FPGA realization of the seven experiments of the source. SDRAM test, test buttons and PIO port interrupt, timer experiment, seg7 experiment, sopc_led test, flash programming, fpga_led, PLL.
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Size: 12833792 |
Author: Air |
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Description: 用VHDL编写的一个PLL,通过了测试,没有什么问题。-DLL
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Size: 286720 |
Author: 孔令军 |
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Description: Verilog HDL语言编写EP2C8Q208芯片PLL分频的简单程序 PLL_12MHz-Verilog HDL language EP2C8Q208 chip PLL frequency of the simple program PLL_12MHz
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Size: 54272 |
Author: malikun |
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Description: IC SI570 VCO/PLL by AVR control system-IC SI570 VCO/PLL by AVR control system
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Size: 4096 |
Author: Mars |
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Description: 设置直接使用外部晶振与使用PLL,10分频的源代码-Set directly and use an external crystal oscillator PLL, 10 frequency of the source code
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Size: 25600 |
Author: 刘成 |
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Description: 用ADS和matlab进行了PLL的仿真实现,对与PLL的学习有一定的作用-Carried out with the ADS and the PLL matlab simulation realization, and the PLL has a role in learning
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Size: 367616 |
Author: 建伟 |
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Description: 锁相技术,老版的电子书,有三阶锁相环的内容。现在的书讲三阶锁相环的不多,找了好久。-Technology of PLL(Phase Lock Loop), the old version of the PLL series book. The valueable part is contents of third-order PLL.,which is not found easily in other books.
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Size: 5541888 |
Author: fengyang |
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Description: 关于锁相环的设计,以及压控振荡器的设计,对于射频研究人员来说是一篇较好的资料。-about pll design
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Size: 21884928 |
Author: 魏志强 |
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Description: design and source code for simulating PLL components with matlab
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Size: 92160 |
Author: Payam |
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Description: 该工程是一个FPGA的开发板
主要包括了FPGA芯片:EP3C25Q240C8
FPGA的配置芯片采用:EPCS16
USB芯片:CY7C68013A
USB的FLASH采用:24LC64
AD芯片:AD9238
电源部分:LMS1117-3.3两块分别对USB、模拟部分和FPGA供电;LMS1117-1.2为FPGA核心电压;LMS1117-2.5为 IO口及PLL供电
9盏LED,4个开关
主要完成的一个功能是高速模拟信号的采集,以及上位机传输,该板经调试可用,现已在实验室批量使用。
铺铜采用了网格形式,并且将模拟部分与数字部分隔离开来。
如有疑问欢迎来询:QQ150524225-The project is an FPGA development board includes an FPGA chip: EP3C25Q240C8 FPGA configuration chip: EPCS16 USB Chip: CY7C68013A USB to FLASH using: 24LC64 AD chip: AD9238 power supply: LMS1117-3.3 respectively, two USB, analog and FPGA Power LMS1117-1.2 for the FPGA core voltage LMS1117-2.5 for the IO port, and PLL power supply 9 LED, 4 switches, a main function is to complete high-speed analog signal acquisition, and the host computer transmission, the plate was debugging is available, is now used in the laboratory batch. Using a grid of copper to form, and the analog part and digital part to isolate. If in doubt welcome to inquiry: QQ150524225
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Size: 2314240 |
Author: 刘卫菠 |
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Description: TEA5767的收音机模块, 采用I2C接口控制,单片机用STC89C52,带1K EEPROM,可以掉电存台,1602LCD显示,这里只给了TEA5767的控制程序, TEA5767读写数据都是5个字节,其中PLL参数14位--Philips TEA5767 use of the radio module, SP3767 and TEA5767 fully compatible with TEA5767 used I2C or three-wire interface control, that I am using the I2C, single-chip with STC89C52, with 1K EEPROM, can be kept down to Taiwan, 1602LCD show here TEA5767 only to the control procedures, TEA5767 to read and write data is 5 bytes, which PLL parameters 14.
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Size: 30720 |
Author: 希 |
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Description: 本程序利用平方环实现载波同步,使用锁相环进行跟踪相位偏移-This program makes use of the square ring to achieve carrier synchronization, with the use of PLL to track the phase shift
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Size: 1024 |
Author: shang |
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Description: Digital PLL Verilog module
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Size: 76800 |
Author: jc |
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Description: 中文资料,ad9910 dds芯片中文资料。非常全面的翻译,适合所有做pll朋友参考使用-chinese pdf ad9910 dds chip Chinese data. Very comprehensive translation, for all to do with pll reference to a friend
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Size: 74752 |
Author: 陈明 |
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