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Description: uart的vhdl实现代码
分模块设计和状态机设计
不错的，用它没错-UART achieve the VHDL code modular design and state machine design good, the right to use it
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Size: 10594 |
Author: 王平 |
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Description: 8051的源代码-8051 source code
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Size: 104724 |
Author: 飞鹰 |
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Description: 1024点８位FFT的Verilog语言实现-1024-point FFT eight Verilog language
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Size: 11831 |
Author: 郭子荣 |
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Description: 叮叮-replaced behind the horn behind the horn behind the horn behind
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Size: 34233 |
Author: mousezhong |
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Description: 完整的jpeg encoder verilog code,DCT部分採用1991 IEEE transection paper,利用skew circular convolution來實現精簡電路-complete jpeg encoder Verilog code, DCT is partly based on the IEEE 1991 transection paper, using skew circular convolutions to achieve streamlining circuit
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Size: 25437 |
Author: 李寧 |
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Description: 该程序是在xilinx的FPGA上实现DDR_SDRAM接口，程序是用verylog语言写的-that the procedure was in Xilinx FPGA to achieve DDR_SDRAM interface, procedures used to write the language verylog
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Size: 23407 |
Author: 冯伟 |
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Description: vhdl和verling hdl 的加法器-VHDL and the Adder.
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Size: 1743 |
Author: 李清 |
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Description: vhdl实现watchdog，在逻辑中可以加入本模块，实现看门狗。-VHDL achieve watchdog, the logic of the modules can be added to achieve watchdog.
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Size: 1071 |
Author: rain |
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Description: 是关于dct的Verilog HDL源代码和测试程序-on the Verilog HDL source code and testing procedures
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Size: 31498 |
Author: 凌风 |
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Description: 一个用verilog编写的模拟交通灯控制的源代码。模拟在十字路口的双向交通灯。-a prepared using Verilog simulation of traffic lights to control the source code. Simulation at the crossroads of two-way traffic lights.
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Size: 6137 |
Author: 江河 |
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Description: 大型嵌入式设备FPGA程序，verilog HDL语言，实现DLL和PCM码流分流。-large embedded FPGA procedures, Verilog HDL, DLL and achieve PCM stream diversion.
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Size: 3184 |
Author: chenlei |
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Description: 使用Verilog语言编写的数字钟程序.有慢校时,快校时,闹钟等功能.-use Verilog language prepared by the digital clock procedures. Schools are slow, quick school, alarm clock functions.
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Size: 5266 |
Author: 刘吉 |
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Description: I2C的slave端程序,用于响应master端,并进行通信-the slave I2C software, in response to the master terminal, and communications
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Size: 31347 |
Author: 刘吉 |
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Description: 串口通信程序.在波特率为9600的串口通信程序-serial communication program. The baud rate for the 9600 serial communication program
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Size: 12512 |
Author: 刘吉 |
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Description: 文件说明了在fpga/cpld中怎样实现数据接口及其实例了urat-note of the document they simply / cpld How Data Interface and the examples of urat
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Size: 2954 |
Author: liu |
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Description: 此文件采用了verilog语言在cpld中怎样实现波形发生器，及其验证程序-this document using the Verilog language in the cpld How to achieve waveform generator, and the verification process
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Size: 4174 |
Author: liu |
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Description: Arm9指令Cache缓存模块的verilog代码，对一些做ARM硬件开发的朋友有参考价值。-Arm9 Instruction Cache Cache Module Verilog code, do some of the hardware development of the ARM friends reference value.
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Size: 3077 |
Author: 杨力 |
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Description: 梁祝音乐设计
hdl语言实现
很常用-love music HDL design language is used
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Size: 1125 |
Author: 愈加 |
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Description: 此代码是用Verilog实现的以太网接口,在此基础上做修改,可以作为一般的以太网接口程序开发.-this Verilog code is used to achieve the Ethernet interface, in this done on the basis of changes as a general Ethernet interface development.
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Size: 123920 |
Author: 刘志明 |
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Description: 采用verilog设计，参考了《数字电子技术》教材，刚刚完成，与大家分享！-using Verilog design, reference to the "digital electronic technology" materials, has just been completed, to share with you! Oh
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Size: 158471 |
Author: 江浩 |
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