VHDL-FPGA-Verilog List Page 1026

VHDL-FPGA-Verilog list

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DS1302Z_RTC Downloaded：0: 10_RTC [DS1302Z]: read and set the RTC, the time displayed on the digital test their own, direct use of classes
Date : 2025-08-12 Size : 779kb User : 建宇
TLC5615_1k Downloaded：0: Advanced experimental _12_DA [TLC5615] _1: By DA output sine wave, frequency 1KHz
Date : 2025-08-12 Size : 3.16mb User : 建宇
FPGASPI Downloaded：0: FPGA SPI Timing interpretation covering all main modules communicate with the DSP
Date : 2025-08-12 Size : 420kb User : yangtaoli
Experiment-37-verilog-program Downloaded：0: This collection of 37 using the experimental procedure verilog language
Date : 2025-08-12 Size : 43kb User : 文彬
TLC5615_1-10k Downloaded：0: Advanced experimental _13_DA [TLC5615] _2: By DA output square wave, frequency adjustable, 1K ~ 10KHz, stepping 1K
Date : 2025-08-12 Size : 727kb User : 建宇
PWM Downloaded：0: FPGA generate PWM wave to control the car, Verilog language, to achieve a simple positive and negative, stop control
Date : 2025-08-12 Size : 266kb User : 姜敏敏
Verilog-by-zhouligong Downloaded：0: Zhou, who verilog essence of information, learning good information FPGA programming.
Date : 2025-08-12 Size : 459kb User :
verilog-learning-of-HuaWei Downloaded：0: Huawei learning verilog information, confidential information, want to learn verilog programming, want to learn FPGA, think later into the Huawei can see.
Date : 2025-08-12 Size : 272kb User :
sale22222222 Downloaded：0: fpga verilog language written vending machine
Date : 2025-08-12 Size : 394kb User : 汤旭
lcd1602 Downloaded：0: FPGA control 1602, the program includes vegilog
Date : 2025-08-12 Size : 551kb User : bodao
DDS Downloaded：0: FPGA generates DDS, unused IP core, containing VERILOG program
Date : 2025-08-12 Size : 572kb User : bodao
example8-SigKeyCheck Downloaded：0: Keyboard debounce keyboard debounce keyboard debounce
Date : 2025-08-12 Size : 288kb User : 李荣华

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