VHDL-FPGA-Verilog List Page 1027

VHDL-FPGA-Verilog list

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at8253a Downloaded：0: Design using VHDL 8253 controller, timing and counting functions, through simulation.
Date : 2025-08-12 Size : 2kb User : xzb
freq_div2 Downloaded：0: Divider using VHDL design, simulation and actual circuit boards are tested, no problem.
Date : 2025-08-12 Size : 1kb User : xzb
minute_ct Downloaded：0: Design using VHDL-minute timer, the clock part of the design, simulation and testing has been passed.
Date : 2025-08-12 Size : 1kb User : xzb
fifo1k_32 Downloaded：0: vhdljichu, completed in vhdl sdram controller functions for
Date : 2025-08-12 Size : 2kb User : mu
control_interface Downloaded：0: vhdl pci interface control section in
Date : 2025-08-12 Size : 2kb User : mu
plx_r Downloaded：0: part of the frequency locked loop vhdl complete clock configuration
Date : 2025-08-12 Size : 1kb User : mu
WITH_SDRAM_DAQ Downloaded：0: pci controller pin assignment section, complete pin assignment
Date : 2025-08-12 Size : 34kb User : mu
EDA Downloaded：0: EDA highlights, with HDML files!
Date : 2025-08-12 Size : 8kb User : 马也
ASK--vhdl Downloaded：0: ASK modulation and demodulation process and VHDL simulation ask modulation and demodulation using VHDL language
Date : 2025-08-12 Size : 41kb User : 刘珊
VHDL- Downloaded：0: Eight for phase comparator, Booth multiplier, that registers of VHDL
Date : 2025-08-12 Size : 2kb User : 刘珊
tlc5615 Downloaded：0: Tlc5615 FPGA-based realization, through its own validation, can be used normally
Date : 2025-08-12 Size : 113kb User : 建宇
DS18B20 Downloaded：0: [DS1302Z]: read and set the RTC, the time displayed on the digital implemented on FPGA. Lesson normal use
Date : 2025-08-12 Size : 818kb User : 建宇

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