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[VHDL-FPGA-Verilog] SDmmcfpgaconfig.tar

Description: MMC卡的VHDL源代码实现，经过大批量生产验证-MMC card VHDL source code to achieve, through large-scale production test
Platform: | Size: 5120 | Author: 喻袁洲 | Hits:

[VHDL-FPGA-Verilog] fpu

Description: 利用FPGA实现浮点运算的verilog代码 希望能够给需要做这方面研究的同仁有所帮助-use FPGA floating-point operations verilog code hope to be able to do this to the need for research in the Tongren help
Platform: | Size: 130048 | Author: jake | Hits:

[VHDL-FPGA-Verilog] verilog_ppt

Description: 华为内部的verilog教材的ppt版本。比较详细。-Huawei internal verilog materials ppt version. More detailed.
Platform: | Size: 262144 | Author: rain6537 | Hits:

[VHDL-FPGA-Verilog] cpu86model

Description: 关于8086的软核fpga代码，可以直接再fpag的开发板上调试，好用而且是免费的-on the 8086 soft-core fpga code can then direct the development fpag board debugging, handy and free
Platform: | Size: 270336 | Author: 赵春生 | Hits:

[VHDL-FPGA-Verilog] fpgalcddriver

Description: 基于FPGA液晶控制器设计与实现，采用VHDL硬件描述语言。-FPGA-based LCD controller design and implementation using VHDL hardware description language.
Platform: | Size: 92160 | Author: 张杰 | Hits:

[VHDL-FPGA-Verilog] lcd

Description: 用FPGA来控制2*16LCD的程序，采用VHDL语言来编写，并且我把他转换为verilog语言，有意者请联系；
Platform: | Size: 1024 | Author: 赵雯 | Hits:

[VHDL-FPGA-Verilog] VerilogHDLbook

Description: VHDL教程 华为公司内部教材，很不错的-VHDL 陆 脤 鲁 脤 禄陋 脦 陋 鹿芦 脣 戮 脛脷 虏 驴 陆 脤 虏 脛 拢 卢 潞 脺 虏 禄
Platform: | Size: 263168 | Author: 汪学明 | Hits:

[Other Embeded program] ip

Description: usart的verilog代码.rar 包括很多的FPGA ip 源码，可以直接应用 uart_vhdl.zip sl811usb包含源程序.rar mc8051_design.zip mcpu_1[1].05.zip minicpu.zip mmc_lark_original.zip -USART the Verilog code. rar, including many of the FPGA ip source, can be applied directly uart_vhdl.zipsl811usb contains the source code. rarmc8051_design.zipmcpu_1 [1] .05. zipminicpu.zipmmc_lark_original.zip
Platform: | Size: 5391360 | Author: 钟阳 | Hits:

[VHDL-FPGA-Verilog] uartsourcecode

Description: uart的FPGA模块，基于VHDL、verilog语言-the FPGA UART modules, based on VHDL, verilog language
Platform: | Size: 293888 | Author: 王辉 | Hits:

[Other] PCI

Description: PCI设计指南The Xilinx LogiCORE PCI interface is a fully verified, pre-implemented PCI Bus interface. This interface is available in 32-bit and 64- bit versions, with support for multiple Xilinx FPGA device families. It is designed to support both Verilog-HDL and VHDL. The design examples in this book are provided in Verilog.-PCI Design Guide The Xilinx LogiCORE PCI interface is a fully verified, pre-implementedPCI Bus interface. This interface is available in 32-bit and 64-bit versions, with support for multiple Xilinx FPGA device families. Itis designed to support both Verilog-HDL and VHDL. The designexamples in this book are provided in Verilog.
Platform: | Size: 899072 | Author: lee | Hits:

[VHDL-FPGA-Verilog] VHDL-Cookbook

Description: VHDL-Cookbook 初学VHDL的好资料。-VHDL-Cookbook novice VHDL good information.
Platform: | Size: 239616 | Author: 花玉良 | Hits:

[VHDL-FPGA-Verilog] SourceFile

Description: PS2鼠标实验Verilog HDL代码-PS2 mouse experiments Verilog HDL code
Platform: | Size: 4096 | Author: 张猛蛟 | Hits:

[VHDL-FPGA-Verilog] Source

Description: PWM的Verilog HDL代码用于FPGA-PWM of the Verilog HDL code for FPGA
Platform: | Size: 2048 | Author: 张猛蛟 | Hits:

[VHDL-FPGA-Verilog] rs232

Description: RS232 verilog design
Platform: | Size: 114688 | Author: liuKe | Hits:

[VHDL-FPGA-Verilog] 62256

Description: EPM1270和ram62256的verilog接口程序，用QuartusII编译
Platform: | Size: 323584 | Author: 汉武帝 | Hits:

[VHDL-FPGA-Verilog] spi

Description: spi协议的FPGA实现(Verlog).-spi protocol FPGA realize (Verlog).
Platform: | Size: 1024 | Author: 徐凯 | Hits:

[Embeded-SCM Develop] 429_enc_dec

Description: Quartus开发环境下开发的Arinc 429总线收发器工程，由于产权问题，提供的程序有删减，标号未尽规范。-Quartus development environment developed under the Arinc 429 bus transceiver works, because the issue of property rights, provided procedures are deleted, not standardized labeling.
Platform: | Size: 679936 | Author: wangyunshann | Hits:

[Multimedia program] video_compression_systems.tar

Description: 视频、图像压缩代码，内附使用说明，建立相应工程后，将Verilog代码ADD之后就可以编译调试，对于学习图像压缩或熟悉FPGA调试环境的人员会有一定的帮助-Video, image compression code, containing instructions to establish the corresponding work will Verilog code can be compiled after ADD debugging, for learning image compression, or are familiar with FPGA debug environment will help staff
Platform: | Size: 186368 | Author: 王弋妹 | Hits:

[VHDL-FPGA-Verilog] S7_UART

Description: 利用FPGA实现串口通信，很好的学习资料 尤其是对 verilog不熟的朋友-FPGA realization of the use of serial communications, a very good learning materials especially in the wake of a friend Verilog
Platform: | Size: 468992 | Author: 杜菲 | Hits:

[VHDL-FPGA-Verilog] T4_sdram_control

Description: verilog语言 利用FPGA控制SDRAM，相信很多朋友都需要 快下载吧-control FPGA Verilog language use SDRAM, believe that many of my friends need to download it faster
Platform: | Size: 19456 | Author: 杜菲 | Hits:
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