Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - ddr2

Search list

[Other] u26a_spice

Description: ddr2控制器一些源码，控制时序及怎样通过嵌入式cpu来进行控制的实例-ddr2 Controller some source code, and how to control the timing of embedded cpu passed to the control of the examples
Platform: | Size: 298074 | Author: zhao | Hits:

[Other resource] xapp935

Description: ddr2 controller, verilog source code from xilinx
Platform: | Size: 347004 | Author: Hubert | Hits:

[Other resource] xapp858[1]

Description: XAPP858 - 利用 Virtex-5 FPGA 实现的高性能 DDR2 SDRAM 接口数据采集 本应用指南描述了用于实现 667 Mbps（333 MHz）高性能 DDR2 SDRAM 接口的控制器和数据采集的技巧。 本数据采集技巧使用了输入串行器/解串器（ISERDES）和输出串行器/解串器（OSERDES）的功能。-XAPP858-use Virtex-5 FPGA high-performance DDR2 SDRA M Interface Data Acquisition Guide describes the application for achieving 667 Mbps (333 MHz) high-performance DDR 2 SDRAM Interface controller and data acquisition techniques. The data collection techniques used serial input / Solution Series (ISERDES) and serial output / Solution Series (O Legacy) function.
Platform: | Size: 297475 | Author: mingming | Hits:

[Communication] DDR_MMC_JEDEC

Description: 关于DDR，DDR2,DDR3和MMC的标准规范。
Platform: | Size: 13941603 | Author: 崔海群 | Hits:

[Other resource] evmdm355-v100

Description: TI EVMDM355 开发板的测试程序,包括BOOT,DDR2,NAND,SD,UART,GPIO等芯片外设的测试驱动.
Platform: | Size: 923384 | Author: xu | Hits:

[Compress-Decompress algrithms] DDR2_sdram

Description: DDR2 的控制器，它是由LATTICE的编译器生成。
Platform: | Size: 967356 | Author: 李国 | Hits:

[Other resource] Xil3SD1800A_MIG_ISIM_vlog_v92

Description: Xilinx DDR2存储器接口调试代码，主频167Mhz，嵌入了CHIPSCORP代码。
Platform: | Size: 3390570 | Author: king523103@163.com | Hits:

[Other resource] ddr2

Description: TI dm643 DDR 配置源代码,可以直接下载到板子上运行
Platform: | Size: 4909 | Author: 张健 | Hits:

[VHDL-FPGA-Verilog] Hardware-Layout-Design-for-DDR2

Description: ddr2的硬件布线设计学习资料-hardware design for ddr2，verilog
Platform: | Size: 538624 | Author: 黄志沛 | Hits:

[VHDL-FPGA-Verilog] DDR2-design-out-of-fpga

Description: FPGA外部的ddr2设计的相关学习资料-off-fpga，ddr design
Platform: | Size: 182272 | Author: 黄志沛 | Hits:

[SCM] S3C2416-DDR2-MMU-IRQ-Jlink

Description: IAR中裸奔S3C2416的例子(DDR2+MMU+中断+J-link）-IAR examples in the streaking S3C2416 (DDR2+MMU+ interrupt+J-link)
Platform: | Size: 26624 | Author: zhouxiulong | Hits:

[Software Engineering] DDR2-controller

Description: My package named design DDR2 Synchronous Data Random Access Memory by verilog.The memory controller is a digital circuit which manages the flow of data going to and from the computer s main memory. It can be a separate chip or integrated into another chip, such as on the die of a microprocessor
Platform: | Size: 10240 | Author: thuanbk | Hits:

[VHDL-FPGA-Verilog] DDR2-verilog

Description: ddr2的Verilog代码，包括时序控制，数据读取，利用verilog编写的ddr2控制器，在spartan6板子上得以验证，成功实现了FPGA与DDR2的通信。-ddr2 of Verilog code, including timing control, data is read using verilog prepared ddr2 controller board on spartan6 be verified, the successful implementation of the FPGA and DDR2 communications.
Platform: | Size: 1490944 | Author: wei | Hits:

[File Format] ddr2-spd

Description: ddr2的一些spd.rar 关于 ddr2 的一些说明文档-ddr2 func doc word just for ref
Platform: | Size: 19456 | Author: zhouqiang | Hits:

[VHDL-FPGA-Verilog] ddr2

Description: ddr2 仿真模型，适应于modelsim 仿真，内涵仿真核源码-ddr2 simulation model adapted to the modelsim simulation, simulation connotation nuclear source
Platform: | Size: 34816 | Author: wsc | Hits:

[Other] t2_hpc

Description: DDR2的控制器设计，完成功能的验证，以及仿真测试，(DDR2 controller design, complete function verification, and simulation test,)
Platform: | Size: 22539264 | Author: aingq | Hits:

[VHDL-FPGA-Verilog] ddr2_module

Description: 设计的DDR2的verilog代码.改代码实现读取DDR2的数据。(the code for DDR2.It is used for reading the data of DDR2)
Platform: | Size: 3072 | Author: fuyhfut | Hits:

[VHDL-FPGA-Verilog] DDR2_Control

Description: 参考例程之Verilog之实现DDR2时序控制实现，ISE开发平台完整工程(Implementation of DDR2 timing control implementation of reference routine Verilog, complete engineering of ISE development platform)
Platform: | Size: 13038592 | Author: tomll | Hits:

[Software Engineering] DDR

Description: 低功耗DDR3芯片手册,DDR2芯片手册(Low power DDR3 chip Handbook,DDR2 chip Handbook)
Platform: | Size: 12024832 | Author: zhoumijihua | Hits:

[Other] DDR2_Control

Description: 本人用verilog编写的DDR2控制器，经测试可用。(I am prepared to use verilog DDR2 controller, the test is available.)
Platform: | Size: 13041664 | Author: chenpeiweiweiwei | Hits:
« 1 2 3 4 5 67 8 9 10 11 ... 15 »

CodeBus www.codebus.net