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[VHDL-FPGA-Verilog] the_design_and_realization_of_DDR2-SDRAM_controlle

Description: ddr2控制器的设计与实现,详细介绍了其结构和思想-the design and realization of DDR2-SDRAM controller
Platform: | Size: 646144 | Author: alins | Hits:

[VHDL-FPGA-Verilog] DDR2_controller

Description: DDR2控制器IP的设计与FPGA实现，使用verilog语言-DDR2 Controller IP Design and FPGA implementation, use the verilog language
Platform: | Size: 1818624 | Author: alins | Hits:

[VHDL-FPGA-Verilog] mt48lc16m4a2

Description: DDR2 仿真模型 DDR2 仿真模型-DDR2 Simulation Model
Platform: | Size: 9216 | Author: 张三 | Hits:

[VHDL-FPGA-Verilog] ssss

Description: spartan—3a对ddr2读写控制源程序，有verilog和vhdl版本-spartan-3a ddr2 read and write control of the source, there are versions of verilog and vhdl
Platform: | Size: 324608 | Author: 刘一平 | Hits:

[VHDL-FPGA-Verilog] ddr2_test

Description: 一个用Verilog写的DDR2的控制器（我们项目是在Altera的FPGA）成功仿真，并且使用到了项目中控制DDR2-A written using Verilog DDR2 controller (our project in Altera' s FPGA) successful simulation, and used to control the DDR2 in project
Platform: | Size: 10875904 | Author: 左洪成 | Hits:

[Other] an408

Description: DDR2 Memory Interface Termination, Drive Strength, Loading, and Design Layout Guidelines
Platform: | Size: 3531776 | Author: mauro | Hits:

[VHDL-FPGA-Verilog] NET2

Description: This file with the wavelet transf Mallat implementation of wavelet Verilog hdl code modules for radi Modelsim 6.6 crack, can be used f A written using Verilog DDR2 cont Simple CPU VHDL implementation an Dual-port RAM design, using Veril Verilog language, a hardware-base FPGA embedded project combat, Man Application FPGA, FPGA-chip hardw Mallat implementation of wavelet Layer of one-dimensional wavelet
Platform: | Size: 1852416 | Author: sansfroid | Hits:

[Other] AllegroDDR2

Description: DDR2讲座allegro 资料不错 可以下载学习-DDR2 PPT reference 资料不错 学习
Platform: | Size: 595968 | Author: zhangfuquan | Hits:

[VHDL-FPGA-Verilog] OK16bit

Description: 16BITS DDR2原理图 讲解 详细 学习用
Platform: | Size: 155648 | Author: zhangfuquan | Hits:

[VHDL-FPGA-Verilog] DDR2_16bit

Description: ddr2原理图设计，原厂电路图设计，很好很强大 16bit-ddr2 schematic design, the original schematic design, a very powerful 16bit
Platform: | Size: 155648 | Author: 田云钧 | Hits:

[SCM] PC2-6400_PC2-UDIMM

Description: 三星的DDR2内存PCB设计文件；ALLEGRO文档格式；-Samsung' s DDR2 memory PCB design document ALLEGRO document format
Platform: | Size: 871424 | Author: supers | Hits:

[VHDL-FPGA-Verilog] user_design

Description: spartan3a-ddr2 (16bits 333M)
Platform: | Size: 10116096 | Author: lhx | Hits:

[VHDL-FPGA-Verilog] Spartan6_DDR2-

Description: Spartan6 硬核MCB读写DDR2 实战篇-Spartan6 real hard-core DDR2 MCB articles to read and write
Platform: | Size: 584704 | Author: fangyuanyong | Hits:

[VHDL-FPGA-Verilog] DDR2_Memory_Test

Description: DDR2 controller which contains verilog files，pdf and so on
Platform: | Size: 234496 | Author: zhang | Hits:

[VHDL-FPGA-Verilog] DDR2_ctrl

Description: DDR2 SDRAM控制器的设计及FPGA验证
Platform: | Size: 434176 | Author: 謝大家 | Hits:

[VHDL-FPGA-Verilog] ddr

Description: 利用硬件verilog语言实现DDR2功能，对信息快速存储-VERILOG DDR2
Platform: | Size: 316416 | Author: | Hits:

[VHDL-FPGA-Verilog] 1024Mb_ddr2

Description: DDR2的Verilog仿真代码，可以使用ModelSim仿真-DDR2' s Verilog simulation code, you can use the ModelSim simulation
Platform: | Size: 36864 | Author: skystorm | Hits:

[Software Engineering] ml505_mig_design_creation

Description: 关于ddr2设计的很好的材料，关于ddr2设计的很好的材料-Ddr2 design on a good material, good design on the material ddr2
Platform: | Size: 4981760 | Author: 王力 | Hits:

[Software Engineering] sdram_introduce

Description: sdram内存技术指南（sdr,ddr,ddr2,ddr3）-sdram memory technology guide (sdr, ddr, ddr2, ddr3)
Platform: | Size: 4068352 | Author: 杨洪涛 | Hits:

[VHDL-FPGA-Verilog] DDRCHv11

Description: Source code for ddr2 dram controller for BEEE
Platform: | Size: 661504 | Author: shiva | Hits:
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