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Description: 关于DDR,DDR2,DDR3和MMC的标准规范。-On the DDR, DDR2, DDR3 and the MMC standards.
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Size: 13941760 |
Author: 崔海群 |
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Description: TI EVMDM355 开发板的测试程序,包括BOOT,DDR2,NAND,SD,UART,GPIO等芯片外设的测试驱动.-TI EVMDM355 development board test procedures, including the BOOT, DDR2, NAND, SD, UART, GPIO chip peripherals such as a test driver.
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Size: 922624 |
Author: xu |
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Description: DDR2 的控制器,它是由LATTICE的编译器生成。-DDR2 controller, it is by the compiler-generated LATTICE.
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Size: 966656 |
Author: 李国 |
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Description: Xilinx DDR2存储器接口调试代码,主频167Mhz,嵌入了CHIPSCORP代码。-Xilinx DDR2 memory interface debug code, frequency 167Mhz, embedded code CHIPSCORP.
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Size: 3390464 |
Author: king523103@163.com |
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Description: TI dm643 DDR 配置源代码,可以直接下载到板子上运行-TI dm643 DDR configuration source code, can be directly downloaded to the board to run
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Size: 5120 |
Author: 张健 |
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Description: ddr2 controller功能控制,里面有四个模块-ddr2 controller functions to control, which has four modules
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Size: 1688576 |
Author: li ji wei |
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Description: DDR2 Controller DDR2 Controller
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Size: 312320 |
Author: tg |
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Description: 三星新的ARM9 S3C2416的电路图纸,可支持DDR2,MLC FLASH-Samsung ARM9 S3C2416 new circuit drawings, supports DDR2, MLC FLASH
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Size: 145408 |
Author: dingding24 |
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Description: It is a first time code being developed to designers who want to get your DDR2 SDRAM on-board in Spartan 3AN Starter Kit - Diligent fully working.-It is a first time code being developed to designers who want to get your DDR2 SDRAM on-board in Spartan 3AN Starter Kit- Diligent fully working.
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Size: 1488896 |
Author: under |
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Description: Modelsim DDR2 SDRAM files
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Size: 280576 |
Author: under |
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Description: 基于FPGA的DDR2控制程序,用verilog编写的。-FPGA-based DDR2 control procedures, prepared by using Verilog.
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Size: 30720 |
Author: 王头 |
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Description: 基于NIOS II的ddr2控制器,配有详细的文档,经验证后可使用.-NIOS II based on the DDR2 controller, equipped with detailed documentation, the experience can be used after certification.
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Size: 3486720 |
Author: Jackie |
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Description: DDR2 SDRAM仿真模型,适合于ModelSim下工作,请先阅读readme-DDR2 SDRAM Simulation Model which is suitable for modelsim. Please read readme file firstly.
Platform: |
Size: 20480 |
Author: rar |
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Description: DDR2 SDRAM 控制器的FPGA实现-DDR2 SDRAM controller FPGA to achieve
Platform: |
Size: 84992 |
Author: 白皓 |
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Description: DDR2源代码 DDR2源代码-ddr2 source code ddr2 source code ddr2 source code
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Size: 299008 |
Author: 司炯 |
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Description: C6455 的 533M DDR2 ram 控制程序。完整代码,可以直接使用。-533M DDR2 ram the C6455 control procedures. Integrity of the code, can be used directly.
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Size: 10240 |
Author: 付彦 |
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Description: TI达芬奇dm644x各硬件模块测试代码,包括nor flash、nand flsh、ddr2 ram、video loop back等。-TI davinci dm644x hardware test source code,include nor flash、nand flsh、ddr2 ram、video loop back and so on.
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Size: 5197824 |
Author: quent |
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Description: DDR2 SDRAM 颗粒初始化以及读写操作时序-Particles as well as the DDR2 SDRAM initialization timing to read and write operations
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Size: 432128 |
Author: robert.wang |
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Description: DDR2时序规范,DDR·
DDR2时序规范,DDR·-DDR2 timing norms, DDR DDR2 timing norms, DDR
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Size: 1933312 |
Author: yangjian |
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Description: DDR2 Module Master Layout Reference Guide2.pdf
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Size: 162816 |
Author: liam |
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