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[VHDL-FPGA-Verilog基于CPLD的VHDL语言数字钟(含秒表)设计

Description: 基于CPLD的VHDL语言数字钟(含秒表)设计
Platform: | Size: 116224 | Author: gaojianlin19880605@163.com | Hits:

[VHDL-FPGA-VerilogCPLD任意分频输出 VHDL

Description: CPLD任意分频输出 VHDL,调试通过
Platform: | Size: 666 | Author: spring718@163.com | Hits:

[Documents用CPLD实现硬件直线插补器

Description: 介绍了采用CPLD器件设计的硬件直线插补器 及其优点,它经过环形分配器及放大电路,同时控制二维(X 向、Y向)步进电机快速实现直线绘制。它比利用软件实现 的直线插补法速度快,精度高,适用于数字控制的机械加工 或绘图设备。
Platform: | Size: 115196 | Author: xxd_seeker | Hits:

[BooksCPLD技术及其应用

Description: CPLD技术及其应用
Platform: | Size: 13313059 | Author: anycrying | Hits:

[Program docFPGA的学习指南,绝对经典,内容比较超值CPLD-FPGA.rar

Description: FPGA的学习指南,绝对经典,内容比较超值CPLD-FPGA.rar
Platform: | Size: 172576 | Author: changroc | Hits:

[Program doc详细介绍了FPGA和CPLD的初级入门内容,是很好的FPGA电子书.rar

Description: 详细介绍了FPGA和CPLD的初级入门内容,是很好的FPGA电子书.rar
Platform: | Size: 192764 | Author: changroc | Hits:

[Develop Tools基于单片机和CPLD的数字相位测量仪设计

Description: 基于单片机和CPLD的数字相位测量仪设计
Platform: | Size: 155389 | Author: liyanhong_26 | Hits:

[Consulting and trainingXILINX全系列产品选型速查指南

Description: 包括XILINX的FPGA、CPLD、IP、工具、开发板等
Platform: | Size: 404947 | Author: zheng_wb@sina.com | Hits:

[Program docCPLD实现快速低开关损耗的优化SVPWM算法

Description: 介绍了利用ALTERA公司的Maxplus Ⅱ软件及ACEX芯片,基于一种用于三相电压型逆变器的优化SVPWM算法,来实现变频调速系统,该算法采纳Kohonen神经网络的优点。选择适当的调制方法和改进的算法,不但可以显著地缩短计算时间,且显著减少开关损耗。用复杂可编程逻辑器件(CPLD) 来实现这种算法非常简单合适。
Platform: | Size: 98553 | Author: zt209@hotmail.com | Hits:

[Embeded-SCM Developverilog实例 [43项]

Description: 嵌入式可编程器件CPLD的典型实例 压缩包,共计43个源码文件。 使用ALTERA的 Muxplus 软件即可编辑仿真 相关软件可在教育网ftp下载[天网查询,有很多站点提供]-Embedded Programmable CPLD in a typical example of compressed, for a total of 43 source document. Altera Muxplus use the software can edit simulation software available from the Education Network ftp download [days Web inquiries, many sites provide]
Platform: | Size: 181248 | Author: 吴旭辉 | Hits:

[VHDL-FPGA-Verilogwhole

Description: ov7620的CPLD采集程序,VHDL语言-ov7620 CPLD acquisition procedures, VHDL
Platform: | Size: 1024 | Author: 韦新峰 | Hits:

[Embeded-SCM Developmax1

Description: cpld数据采集测频-cpld Frequency Measurement Data Collection
Platform: | Size: 5120 | Author: 和任 | Hits:

[Embeded-SCM Developvme2hex

Description: 在嵌入式系统中用CPU下载CPLD的代码,这是最后将VME文件转成HEX文件的代码。--Download CPLD through CPU in embedded system. This is the code to convert VME file to HEX file in the end.
Platform: | Size: 11264 | Author: 可可 | Hits:

[Applicationstechcpld

Description: CPLD programming guide
Platform: | Size: 4025344 | Author: 彭明 | Hits:

[VHDL-FPGA-Veriloginface

Description: 一种接口控制板的逻辑电路设计CPLD程序。-an interface to the control board CPLD logic circuit design process.
Platform: | Size: 4096 | Author: 欧阳锋 | Hits:

[SCMupsd_logic

Description: UPSD3200系列单片机CPLD逻辑功能C51开发包代码!-UPSD3200 Series MCU CPLD logic functions C51 Development Kit code!
Platform: | Size: 9216 | Author: 东东 | Hits:

[VHDL-FPGA-Verilog基于CPLD-FPGA的半整数分频器的设计

Description: 基于CPLD-FPGA的半整数分频器的设计,用于设计EDA-based CPLD-half FPGA integer dividers in the design, design for EDA
Platform: | Size: 21504 | Author: 胡路听 | Hits:

[ARM-PowerPC-ColdFire-MIPS21IC ARM微控制器LPC210X的LCD接口技术

Description: 摘要:本文分别以GPI0口直接连接、串行转换连接、CPLD分部连接三种方法阐述了无外部总线的Philips ARM微控制器LPC210X与点阵图形液晶显示器的接口设计,并给出硬件电路框图和主要程序。 -Abstract : GPI0 I were to directly connect a serial link, connecting CPLD Division three methods described without external bus Philips LPC210X ARM microcontroller and graphics dot-matrix LCD interface design, hardware and circuit diagram is given and the main proceedings.
Platform: | Size: 7168 | Author: 小陈 | Hits:

[Other Embeded program低频数字式相位测量仪

Description: 低频数字式相位测量仪; 此系统由相位测量仪、数字式移相信号发生器和移相网络三部分组成。为使系统更加稳定,使系统整体精度得以保障,本电路两块T89C52为核心控制器件分别控制相位测量、数字式移相信号发生,在数字式移相信号发生部分采用了锁相技术、CPLD等技术, 使输出波形精度大大提高,并可对频率自动校验,提高频率稳定性。-low-frequency digital phase-measuring instrument; This system consists of phase-measuring instrument, digital phase shifting generator and phase three network components. To make the system more stable, the overall accuracy of the system can be protected, the two T89C52 circuit control devices at the core respectively phase measurement control, digital believe the shift occurred, the digital shift occurred some believe that the use of lock-in technologies, such as CPLD technology, the output waveform accuracy greatly improved, and can automatic calibration frequency, frequency stability.
Platform: | Size: 433152 | Author: 逸飞 | Hits:

[Communication用cpld实现曼彻斯特编码2

Description: 此曼彻斯特码的解码程序是采用VHDL硬件语言编写的。-this procedure code decoder VHDL hardware is used to prepare the language.
Platform: | Size: 3072 | Author: 游畅 | Hits:
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