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Description: 本设计的基本要求是以复杂可编程逻辑器件CPLD为基础，通过在EDA系统软件ispDesignExpert System 环境下进行数字系统设计，熟练掌握该环境下的功能仿真，时间仿真，管脚锁定和芯片下载。
本系统基本上比较全面的模拟了计数式数字频率计，广泛应用于工业、民用等各个领域，具有一定的开发价值。
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Size: 439843 |
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Description: cpld与单片机接口设计,利于电子设计及应用- Interface design between microprocessor and cpld ,suit for IC design and application
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Size: 8411 |
Author: 宋健 |
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Description: 基于CPLD-FPGA的半整数分频器的设计，用于设计EDA-based CPLD-half FPGA integer dividers in the design, design for EDA
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Size: 21359 |
Author: 胡路听 |
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Description: cpld的入门交流：CPLD的跑馬燈一个简易型cpld试验电路用VHDL语言遍的-cpld entry exchange : CPLD 5,250 cpld an easy-to-use test circuit using VHDL times the
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Size: 64883 |
Author: 口是心非 |
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Description: 本教程定位于FPGA/CPLD的快速入门。以ALTERA公司的芯片和相应的开发软件为目标载体进行阐述，本教程阐述了ALTERA主要系列芯片PLD芯片的结构和特点以及相应的开发软件MAX和Plusa和Quartus的使用-position in the handbook FPGA / CPLD Quick Start. With Altera's chips and the corresponding development of software for the target vector elaborate, the tutorials explain the main chips Altera PLD chips on the structure and characteristics of the corresponding software development MA Plusa and X and the use Quartus
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Size: 4329224 |
Author: 小易 |
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Description: 用cpld实现曼彻斯特编码
用verilog HDL进行曼彻斯特编码，用于通信中-cpld achieve with Manchester encoding with Verilog HDL Manchester encoding. for Communication
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Size: 4579 |
Author: 李鹏 |
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Description: cpld下载电缆的详细图纸及说明，244实现，稳定，速度不错。-cpld download cable detailed drawings and descriptions, 244 realization, stable, good speed.
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Size: 4285693 |
Author: mengzi |
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Description: CPLD最小系统原理图，包括电源，JTAG-CPLD minimum system diagram, including the power supply, JTAG
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Size: 56320 |
Author: 可乐 |
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Description: 基于cpld的lcd控制器实现中英文字符和图像的显示-Based on the lcd controllers cpld English characters and images in the display
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Size: 2048 |
Author: cdh |
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Description: 基于CPLD的单片机VGA显示系统的设计CPLD-based design of single chip VGA Display System-CPLD-based design of single chip VGA Display System
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Size: 1122304 |
Author: dd1638 |
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Description: 基于ARM和CPLD的嵌入式数字图像处理系统（v10）.-CPLD based on embedded ARM and digital image processing system (v10).
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Size: 95232 |
Author: yongge |
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Description: 单片机和CPLD接口电路，用CPLD取代并口扩展等-MCU and CPLD interface circuit, replaced with a CPLD parallel port expansion, etc.
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Size: 75776 |
Author: mshsnyu101 |
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Description: 使cpld 设计PCI总线接口，内部包含原理图，设计参考。-PCI CPLD SCH
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Size: 574464 |
Author: ban |
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Description: 用CPLD+SRAM驱动数字TFT屏的例子，希望对大家有所帮助-With CPLD+ SRAM drive digital TFT screen example, we want to help
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Size: 2048 |
Author: dengde |
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Description: CPLD编程，处理两路编码器的信号，可以将信号四倍频。同时能够控制IO的输入输出信号。-cpld program
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Size: 353280 |
Author: 孙鹏飞 |
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Description: CPLD + CAN总线改造，采用CPLD 进行编程，实现移相编码和电机功率输出， CAN总线进行数据通讯，使各节点独立工作又集中管理，实现集散控制。节点电机调速方案中，微控制器选用8位高性能微转换器ADμC812，逻辑与伺服控制采用全数字化方式，晶闸管主电路触发器选用ALTERA公司的 EPM7256S CPLD来完成。-CPLD+ CAN bus transformation, using CPLD for programming, coding and phase motor power output, CAN bus for data communication, so that each node independently and focus on management, distributed control. Node in the motor control program, use 8-bit high performance microcontroller micro-converter ADμC812, logic and all-digital servo control mode, the main thyristor trigger circuit used ALTERA company EPM7256S CPLD to complete.
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Size: 67584 |
Author: 李飞 |
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Description: CPLD的介绍，请认真看，很基础，可以打印出来(CPLD introduction, please look carefully, very basic, you can print out)
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Size: 139264 |
Author: lijunpeng0390
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Description: 51单片机和CPLD的双向串口收发，需要硬件支持，此版本在实际硬件上调试成功(51 MCU and CPLD two-way serial transceiver,Requires hardware support and this version is successfully debugged on the actual hardware)
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Size: 22138880 |
Author: Quinn chen
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Description: 通过CPLD和外部Flash芯片对FPGA进行配置。(By CPLD and external Flash chip of FPGA configuration.)
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Size: 82944 |
Author: xiaohu111
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Description: 从零开始学CPLD和VERILOG HDL(Learn CPLD and VERILOG HDL from zero)
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Size: 32979968 |
Author: Jerry20170718 |
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