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Description: 用verilog写的cpld的各种分频程序，希望大家指正，谢谢！-using Verilog cpld written by the various sub-frequency procedures in the hope that we stand corrected, thank you!
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Size: 1024 |
Author: 沈柱 |
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Description: 用cpld开发的激光控制器的源码，已经是成型产品，希望对大家有用-cpld developed using laser controller source, it is already shaping products, we hope to useful
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Size: 338944 |
Author: 王石子 |
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Description: 在FPGA或CPLD上实现的一中非常实用的倍频电路，只要输入频率高，精度就很高-the CPLD or FPGA to achieve a very practical frequency circuit, as long as the input frequency, on the high precision
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Size: 75776 |
Author: 王石子 |
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Description: 该代码为配合7号信令模块MK50H27的cpld(xilinx 95144)的逻辑代码,其中包括了VHDL及原理图.-the code to meet on the 7th of signaling modules MK50H27 cpld (Xilinx 95144 ) logic code, which included a schematic and VHDL.
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Size: 720896 |
Author: 王珏 |
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Description: 关于用CPLD和FPGA做插补算法的内容,对于想用FPGA做控制的朋友是个好的借鉴!-on with CPLD and FPGA done interpolation algorithm, for to do with the control of the FPGA is a good friend from!
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Size: 191488 |
Author: 舟舟 |
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Description: xilinx xc9572 cpld 实现的伺服电机控制器，电机控制输出，和增量编码器读取。-Xilinx xc9572 cpld achieve servo motor controller, motor control output, Incremental encoder and the reader.
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Size: 797696 |
Author: 张宏亚 |
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Description: yon用硬件描述语言写的曼彻斯特编解码,并在Xilinx CPLD上的实现,内容齐全,是学习的好资料-yon hardware description language used to write the Manchester encoding and decoding Xilinx CPLD and the realization that the complete study is a good information
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Size: 10240 |
Author: slam |
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Description: lattice cpld优化技巧资料，无需密码，下载即用！-lattice cpld optimization techniques, without password, download and use!
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Size: 297984 |
Author: 邓丰涛 |
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Description: CPLD与51单片机总线接 -CPLD with 51 microcontroller bus access
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Size: 5120 |
Author: liang |
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Description: 基于CPLD的多功能信号发生器设计.PDF-CPLD-based signal generator multifunctional design. PDF
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Size: 126976 |
Author: 0000 |
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Description: 基于CPLD的二进制码转换为二十进制（BCD）码的电路[1].pdf-based CPLD binary code into two decimal (BCD) code circuit [1]. Pdf
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Size: 155648 |
Author: 张三 |
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Description: 用CPLD控制图像卡进行帧存逻辑的verilog程序,用Quartus II 5.0打开-with CPLD control image frame buffer cards logical verilog procedures, Quartus II 5.0 Open
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Size: 1024 |
Author: 陈刚峰 |
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Description: 这是本人毕业设计的源码部分,主要完成了步进电机的智能控制:采用AVR系列单片机做主空单元,可红外遥控,其中脉冲分配由CPLD实现.-This is my graduation design source, the major completed intelligent stepper motor control : using AVR Series MCU module comes air, infrared remote control, which pulse distribution by CPLD.
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Size: 13312 |
Author: Jawen |
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Description: 这是我最近买的一套CPLD开发板VHDL源程序并附上开发板的原理图,希望对你是一个很好的帮助!其中内容为:8位优先编码器,乘法器,多路选择器,二进制转BCD码,加法器,减法器,简单状态机,四位比较器,7段数码管,i2c总线,lcd液晶显示,拨码开关,串口,蜂鸣器,矩阵键盘,跑马灯,交通灯,数字时钟.-which I have recently bought a CPLD Development Board VHDL source code accompanied the development of the plate diagram, You hope to be a good help! which states : eight priority encoder, multipliers, multi-path selectors, BCD binary switch, adder, subtraction device, the simple state machine, four comparators, seven of the digital control, i2c bus, lcd LCD allocated code switches, serial port, the buzzer sounded, matrix keyboards, Bomadeng, traffic lights, Digital Clock.
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Size: 4642816 |
Author: Jawen |
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Description: turbo jtag CPLD source code
use altera EPM7128S
-turbo jtag CPLD source code use altera EPM7 128S
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Size: 2048 |
Author: z8848 |
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Description: 基于可编程逻辑器件CPLD和直接数字频率合成技术（DDS）的三相多波形函数发生器-based CPLD and direct digital frequency synthesis (DDS) over the three-phase waveforms letter Number Generator
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Size: 92160 |
Author: liujl |
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Description: 本软件在CPLD上实现数字PWM控制，用Verilog HDL语言编写，在MAX ＰＬＵＳ ＩＩ调试成功，可用-the software on the CPLD digital PWM control, using Verilog HDL language, MAX PLUS II in debugging success can be
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Size: 232448 |
Author: wjz |
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Description: 这是由xilin公司提供的测试文档，对于用XILINX公司的CPLD/FPGA的用户来说挺不错的。-xilin provided by the test documents, XILINX used for the CPLD/FPGA users quite well.
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Size: 196608 |
Author: 苏晓利 |
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Description: 利用单片机对CPLD进行配置,地层函数另作一个文件，移植方便-SCM right CPLD for distribution, another for the formation function, a document to facilitate transplant
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Size: 31744 |
Author: baoli |
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Description: verilog 编写的I2c协议程序，用于cpld读写EEPROM-verilog I2c agreement prepared by the procedures for cpld writable EEPROM
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Size: 447488 |
Author: 丁明 |
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