Description: This is a five-frequency circuit design, but for the 50% duty cycle, a certain ingenious design
To Search:
- [beipin] - using Verilog cpld written by the variou
- [news5f] - Verilog HDL prepared by the five-frequen
- [div5] - simple verilog 0.2-frequency circuit des
- [my_design_frequency] - in digital circuits, and often the need
- [VHDL_FOR_DIV] - clearly described how to use VHDL design
- [PMVF] - by Professor Fanger PMV- PPD evaluation
- [AD8402] - Digital Potentiometers AD8402 driver, AD
- [cpld] - a handy integer frequency divider circui
- [VHDL] - This article describes the use of exampl
- [PWN] - The code is in the Keil uVision3 environ
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