VHDL-FPGA-Verilog List Page 766

VHDL-FPGA-Verilog list

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altera Downloaded：0: altera official variety of useful references, are their own collection, problems can easily view
Date : 2025-07-02 Size : 16.21mb User : ddiao
test8 Downloaded：0: Xilinx engineering documents, test8. V is the source code, to achieve the cascaded carry adder, subtracter, and logical operations function. Running through, the simulation is successful.
Date : 2025-07-02 Size : 140kb User : gjjh
saa7113_i2c Downloaded：0: I2C configuration, based on the SAA7113 AD
Date : 2025-07-02 Size : 2kb User : sushuai
VGA_verilog Downloaded：0: Based on a screen using verilog write protection circuit VGA interface, creative point is animated by means of pictures showed no change, but a purely logical calculus.
Date : 2025-07-02 Size : 341kb User : 顾客
dac9747 Downloaded：0: Mainly to complete ADI' s DAC (digital- analog converter) SPI interface to configure the AD9747 and the register of
Date : 2025-07-02 Size : 1kb User : ywy
ii2c Downloaded：0: IIC data bus verilog code, has passed the test with modelsim.
Date : 2025-07-02 Size : 50kb User : 谢琳涛
sdr_sdram_epm570 Downloaded：0: SDRAM write and read test based on CPLD chip-- EPM570.
Date : 2025-07-02 Size : 1.04mb User : 黄成林
sdram_epm570_uart Downloaded：0: the UART verilog hdl code based on CPLD chip-- EPM570
Date : 2025-07-02 Size : 1.28mb User : 黄成林
sdr_sdram_EP1C3T144C8N Downloaded：0: the SDRAM verilog hdl code based on FPGA chip-- EP1C3T144C8N
Date : 2025-07-02 Size : 5.16mb User : 黄成林
count-12 Downloaded：0: SHI ER JIN ZHI
Date : 2025-07-02 Size : 723kb User : dsggdfs
Tubes-VLSI Downloaded：0: 64 FFT pada program VHDL
Date : 2025-07-02 Size : 1.36mb User : Yolen
LED Downloaded：0: VHDL ultrasonic ranging code, you have a look, tested can be used, the entity name I changed it to LED
Date : 2025-07-02 Size : 1kb User : 杨勇

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