VHDL-FPGA-Verilog List Page 762

VHDL-FPGA-Verilog list

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PSG Downloaded：0: AY-3-8910 module for Altera Nios II. verilog source code, hw_tcl file and R-2R DAC schematic.
Date : 2026-01-03 Size : 45kb User : charlie
spectrum_system_back Downloaded：0: Completion of the interference spectrum inversion of the data series of operations: FFT and phase alignment parameter calculations.
Date : 2026-01-03 Size : 11kb User : zhanglei
verilog-hdl Downloaded：0: The design is based on four basic concepts answer. From the practical application, the use of electronic design automation (EDA) technology, using a programmable logic device design with extensions Responder. It Verilog
Date : 2026-01-03 Size : 2kb User : hering
38coder Downloaded：0: Realizing the function of a decoder circuit 38 VHDL code.
Date : 2026-01-03 Size : 1.24mb User : 付家承
Vrilog-hdl--Sequence-check.doc Downloaded：0: use rilogHDL define a Sequence check Instrument
Date : 2026-01-03 Size : 5kb User : 李创
rs_decoder_31_19_6_latest.tar Downloaded：0: 　
Date : 2026-01-03 Size : 25kb User : 贺文忠
fpga_shuzixinghao Downloaded：0: The books on the fpga learning materials, the algorithm about digital signal processing
Date : 2026-01-03 Size : 6.8mb User : sad
ILI9325---20131129 Downloaded：0: ILI9325 driver code, and the use of TFT screen display pictures of a pair of red
Date : 2026-01-03 Size : 4.48mb User : sad
sdram_read_write_a_word Downloaded：0: Sdram driver and read and write operations, 256 bytes written
Date : 2026-01-03 Size : 1.04mb User : sad
ps2_lcd16 Downloaded：0: it is design by verilog language.the function is encode the keyboard and show on lcd. notice:the encode part is only encode one key. and only encode part of the keyboard.
Date : 2026-01-03 Size : 799kb User : lee
FPGAluojidaima Downloaded：0: 16 channel logic analyzer, 100 m, the FPGA code, including FIFO, DRAM, usb, etc
Date : 2026-01-03 Size : 13kb User : 钢灵海川
cpu-design Downloaded：0: CPU design is realized by VHDL Language, the project contains the test waveform. Contains the CPU design documents, such as directives format, instructions for each function module and test sequence. The project can run
Date : 2026-01-03 Size : 1.53mb User : yuuuuuu

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