VHDL-FPGA-Verilog List Page 763

VHDL-FPGA-Verilog list

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mouse_led Downloaded：0: mouse to led movements to realize where the x and y coordinates. After the first falling-edge tick and the rx-en signal are asserted, the FSMD shifts in the start bit and moves to the dps state. Since the received data i
Date : 2025-07-03 Size : 331kb User : hirrimi
sssd Downloaded：0: MB CARD FPGA ENTERANCE FOR production lines to inc. process quality and monitoring process step by step phase for better under standing of manufac turing
Date : 2025-07-03 Size : 7kb User : hirrimi
ac97_latest.tar Downloaded：0: AC97 verilog source code
Date : 2025-07-03 Size : 89kb User : jackey zhou
time Downloaded：0: YYMMDDHHMMSS timer
Date : 2025-07-03 Size : 2.41mb User : 孟祥
audio_fft_vga Downloaded：1: Achieved using the Verilog HDL code using WM8731 audio sampling, and use ALTERA FPGA to achieve the calculated spectrum (FFT), shows the spectrum on VGA.
Date : 2025-07-03 Size : 38kb User : Yang Lv
fpga_fmsc Downloaded：0: The code on the FPGA to achieve with the STM32 microcontroller timing code FSMC bus communication is verified on ALTERA FPGA.
Date : 2025-07-03 Size : 11kb User : Yang Lv
stm32f103_ad9854 Downloaded：0: Use STM32F103RBT6 MCU AD9854 driver can specify a sinusoidal output signal frequency.
Date : 2025-07-03 Size : 244kb User : Yang Lv
multi Downloaded：0: 4 bit multiply
Date : 2025-07-03 Size : 1kb User : 王一
EDA-clock Downloaded：0: The clock design based on FPGA, the main can realize clock and calendar function
Date : 2025-07-03 Size : 809kb User : 林盛
Sum Downloaded：0: Achieve a simple verilog adder function code can provide learning for the beginners.
Date : 2025-07-03 Size : 17kb User : Jersey
BASYS2 Downloaded：0: xilinx development board company basy2 Tutorial.
Date : 2025-07-03 Size : 6.88mb User : 伍卅
iis Downloaded：0: I2S verilog RTLs, very easy to read
Date : 2025-07-03 Size : 15kb User : liwei039

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