VHDL-FPGA-Verilog List Page 733

VHDL-FPGA-Verilog list

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dds Downloaded：0: FPGA need DDS source waveform output can be achieved using VHDL language, easy to understand.
Date : 2025-06-30 Size : 14kb User : 方文丹
Zynq_AMP_Example Downloaded：0: ZYNQ platform to build, ZYNQ chip applications. Beginners will certainly help
Date : 2025-06-30 Size : 1.1mb User : 刘海
spi_mcu Downloaded：0: SPI Slave interface, interface with external controller. SPI port to achieve external conversion logic module interface internal registers
Date : 2025-06-30 Size : 1kb User : benjamin
all_test_3 Downloaded：0: FPGA chip development board corresponding device testing procedures, including led, buttons, AD/DA and other devices
Date : 2025-06-30 Size : 8.11mb User : 曾彬
hello_sd Downloaded：0: Based on the language and under the fpga verilog realize spi mode nios ii sd card driver, and adding znfat sd card file system driver, you can read files sd card.
Date : 2025-06-30 Size : 23.45mb User : lht
lcd12864_hanzi_zifu Downloaded：0: Based vhdl 12,864 characters and character display program, with character, pro-test available
Date : 2025-06-30 Size : 1.39mb User : 刘诗男
cnt1_fenpin Downloaded：0: Based on an arbitrary dividing vhdl procedures, adjustable duty cycle,
Date : 2025-06-30 Size : 4kb User : 刘诗男
dds Downloaded：0: Vhdl and DDS-based direct frequency synthesis process and generate a sine wave
Date : 2025-06-30 Size : 319kb User : 刘诗男
ADC_DAC_V2.0_EP2C35Q240C8 Downloaded：0: Based vhdl of AD DA conversion speed, EP3C25Q240
Date : 2025-06-30 Size : 894kb User : 刘诗男
LCD-1602 Downloaded：0: Based on the lcd1602 vhdl display program,
Date : 2025-06-30 Size : 71kb User : 刘诗男
apb_uart Downloaded：0: APB to UART , Its A bridge which converts apb transaction to UART
Date : 2025-06-30 Size : 233kb User : mubarak
pcm_read_cmd Downloaded：0: the time of reading PCM on NEXYS3
Date : 2025-06-30 Size : 1kb User : 赵宝琦

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