VHDL-FPGA-Verilog List Page 731

VHDL-FPGA-Verilog list

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UART_DMA Downloaded：0: UART_DMA way is to use uart dma transfer nios implemented in the hardware platform validated by
Date : 2025-06-29 Size : 944kb User : 黄信
SW_HEX Downloaded：0: SW_HEX.rar is written in verilog achieve counting function keys
Date : 2025-06-29 Size : 642kb User : 黄信
DE2_70_NET_UART_DMA Downloaded：0: Write c code using NIOS dma transfer, adding dma9000 network transmission function
Date : 2025-06-29 Size : 22.83mb User : 黄信
ad7606 Downloaded：0: ADC7606 driver code, using Verilog to achieve
Date : 2025-06-29 Size : 2kb User : 小云
16_clk_generator Downloaded：0: Simply divide any source, the output frequency can be changed by adjusting the parameters
Date : 2025-06-29 Size : 2.88mb User : libo
TSE_RGMII_With_SDC Downloaded：1: Official Altera Triple-Speed Ethernet IP Core RGMII using routines
Date : 2025-06-29 Size : 46kb User : 王焱
Ethernet_Accel_Design Downloaded：1: Accelerating Nios II Ethernet Applications User Guide
Date : 2025-06-29 Size : 2.53mb User : 王焱
LED Downloaded：0: The sample of LED of quartus II 9.0 with the language of Verilog
Date : 2025-06-29 Size : 1.16mb User : peanut
Simple_Logic_Continue Downloaded：0: The module 74161 with the language of verilog
Date : 2025-06-29 Size : 1.31mb User : peanut
XC2C Downloaded：0: FPGA-based 8-channel ECG data acquisition, send MSP430.
Date : 2025-06-29 Size : 1kb User : wenda
fenpin Downloaded：1: fractional frequency
Date : 2025-06-29 Size : 243kb User : 洪世林
shuzishizhong Downloaded：0: digital clock
Date : 2025-06-29 Size : 6.41mb User : 洪世林

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