VHDL-FPGA-Verilog List Page 737

VHDL-FPGA-Verilog list

Sort by ：

« 1 2 ... .32 .33 .34 .35 .36 737.38 .39 .40 .41 .42 ... 4310 »

DE0_NANO_VGA Downloaded：0: ntity DE0_NANO is Port ( CLOCK_50 : in STD_LOGIC --//////////// LED ////////// LED : out STD_LOGIC_VECTOR(7 DOWNTO 0) -- --//////////// KEY ////////// KEY : in STD_LOGIC_VECTOR(1 DOWNTO 0) -- --//////////// SW //////////
Date : 2025-06-30 Size : 3.12mb User : Mahmoud
dianziqin2--lcd Downloaded：1: Development board based on Altera' s DE2- EP2C35F672C6, making organ, realize do, re, mi, fa, sol, la, xi, do eight tones, and can choose manual or automatic playback, which can be achieved manually storage and playba
Date : 2025-06-30 Size : 3mb User : shuaiwa
RLS-Algorithm Downloaded：0: I am giving new files related to RLS algorithm
Date : 2025-06-30 Size : 178kb User : shashank
CRC_test Downloaded：0: CRC verilog
Date : 2025-06-30 Size : 20kb User : jack
kcpsm3 Downloaded：0: main VHDL entity for PicoBlaze chip control
Date : 2025-06-30 Size : 8kb User : Tim Gep
verilog_EXAMPLE_100- Downloaded：0: Production design example Verilog language, suitable for beginners, through the verification code.Contains the PCI, i2c, etc
Date : 2025-06-30 Size : 185kb User : 王虎
DDR2_VERILOG Downloaded：0: Based on the FPGA implementation of DDR2_SDRAM Verilog code, more practical, proven by simulation.
Date : 2025-06-30 Size : 1.73mb User : 王虎
SSRAM_250M Downloaded：0: I write the SSRAM high-speed, speaking, reading and writing, engineering includes NIOS soft core, timing constraint is studied by using Quartus TimeQuest tools, work to debug the highest literacy rate of up to 250 MHZ.
Date : 2025-06-30 Size : 21.61mb User : 王虎
SSRAM_by_Verilog Downloaded：0: Details interface design of reading and writing of ssram，it have guidance value.Including the main source code to read and write and sequence diagram.
Date : 2025-06-30 Size : 251kb User : 王虎
CAN_Verilog Downloaded：0: CAN Protocol Controller
Date : 2025-06-30 Size : 32kb User : 钱红
UART Downloaded：0: The program contains the serial uart VERILOG program and test code
Date : 2025-06-30 Size : 407kb User : 钱红
usb Downloaded：0: This article contains a USB verilog code and testing procedures
Date : 2025-06-30 Size : 152kb User : 钱红

« 1 2 ... .32 .33 .34 .35 .36 737.38 .39 .40 .41 .42 ... 4310 »

Search in result