VHDL-FPGA-Verilog List Page 387

VHDL-FPGA-Verilog list

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project_wave Downloaded：0: Waveform generator to generate triangular wave and sine wave
Date : 2025-06-11 Size : 9.42mb User : 吴明华
2016sell Downloaded：0: The vending desktop module includes: coin processing module, product selection module, coin module, frequency division module, controller module, timing module, the LED display module, the change module, the module of sh
Date : 2025-06-11 Size : 2.15mb User : 张任
CRC Downloaded：0: In the process of data communication,data verification is an indispensable part, CRC verification is an efficient way to test.
Date : 2025-06-11 Size : 1kb User : 文化
LBG64_double_CLK Downloaded：0: Data compression algorithm implemented in hardware ASIC & FPGA (vector quantization algorithm)
Date : 2025-06-11 Size : 578kb User : 崔琦
wireless_FPGAcode Downloaded：0: The wireless communication module design including FPGA code matlab verilog model file and source code
Date : 2025-06-11 Size : 214kb User : 崔琦
FPGA_JOW Downloaded：0: The design management system for the school bell, the use of VHDL to design, according to different output different music in Bell functions, working modes including normal class mode, test mode, the holiday mode
Date : 2025-06-11 Size : 2.33mb User : li
FPGA_JOW74160 Downloaded：0: This design uses 74160 period design digital clock, and the design of waveform simulation, the use of II QUARTUS design software, the design of the digital clock with the unit logic device to help
Date : 2025-06-11 Size : 456kb User : li
key_board Downloaded：0: The design is to achieve a 4*4 matrix keyboard design, the matrix keys to the value of the button to send to the host computer through the serial port
Date : 2025-06-11 Size : 637kb User : li
20150608 Downloaded：0: Using VHDL to design a dual channel high-speed ADC acquisition circuit, the analog data acquisition, USB sent to the computer
Date : 2025-06-11 Size : 405kb User : lily
EDA Downloaded：0: VHDL language with a variety of small modules, there is a revolving door, counters, registers, and so the cycle
Date : 2025-06-11 Size : 12kb User : ChenDehua
Zynq-7000-for-Hardware-Engineers Downloaded：0: Zynq-7000 Extensible Processing Platform Design Workshop for Hardware Engineers
Date : 2025-06-11 Size : 1.99mb User : yin
Zynq-7000-for-Software-Engineers Downloaded：0: Zynq-7000 Extensible Processing Platform Design Workshop for Software Engineers
Date : 2025-06-11 Size : 1.84mb User : yin

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