VHDL-FPGA-Verilog List Page 385

VHDL-FPGA-Verilog list

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Song-playback-circuit-design-VHDL Downloaded：0: Song playback circuit design VHDL simulation report attached, and the top-level source file
Date : 2025-08-24 Size : 430kb User :
CPUver2 Downloaded：0: 翻译关闭即时翻译英语中文德语检测语言中文(简体) 英语日语这是一个有关单周期CPU设计的一个参考，里面顶层模块已经写好，而其他模块的内容则是以注释的形式存在，如果要跑这个代码的话，把include的那些代码注释掉然后再将各个模块被注释的代码取消注释即可。 This is a reference about a single cycle CPU design, top-level module which has been
Date : 2025-08-24 Size : 3kb User : 郑嘉俊
timecounter60sandpause Downloaded：0: Digital timer 60s do count, an external keyboard to pause
Date : 2025-08-24 Size : 772kb User : hyy
Divisor_Frec Downloaded：0: Code in vhdl of divisor of frequency in FPGA
Date : 2025-08-24 Size : 1kb User : Jhon HDZ
cronometro1.c Downloaded：0: cronometro atmel 328p code vision avr
Date : 2025-08-24 Size : 1kb User : vidal
EPD Downloaded：0: Quartus II phase discriminator
Date : 2025-08-24 Size : 2kb User : snow
FPGA-2048 Downloaded：0: Will randomly appear in a small number of the start box 2, each of which you can choose a direction to go up and down the slide, each slide once, all digital boxes will move closer to the sliding direction, the system wi
Date : 2025-08-24 Size : 6kb User : 吴国耀
ARM(Verilog-a-VHDL) Downloaded：0: Based on VHDL/Verilog implementations arm0, ARM5-7 nuclear
Date : 2025-08-24 Size : 1.55mb User : 吴国耀
Simple-design-of-traffic-lights Downloaded：0: Traffic lights show there are many ways, such as intersections, T-junction, etc., and for the same intersection there are a lot of different display requirements, such as crossroads, if the car as long as the north-south
Date : 2025-08-24 Size : 86kb User : li
Multiplier Downloaded：0: Can design a multiplier multiplying two decimal numbers, the multiplier and multiplicand are less than 100.
Date : 2025-08-24 Size : 25kb User : li
DEMUX1_4 Downloaded：0: this project about demultiplexer one to four compiled and implanted in cart fpga xilinx 3E, with file .bit
Date : 2025-08-24 Size : 208kb User : gps
MUX4_1_2bits_fonction Downloaded：0: this project about multiplexer four to one compiled and implanted in cart fpga xilinx 3E, with file .bit
Date : 2025-08-24 Size : 98kb User : gps

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