VHDL-FPGA-Verilog List Page 390

VHDL-FPGA-Verilog list

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tcd1206 Downloaded：0: the driver of tcd1206d(verilog),which had been tested
Date : 2025-06-12 Size : 5.76mb User : 小武
ethernet Downloaded：1: Achieve opencore Ethernet mac layer development version of Verilog code, design documents containing English and datasheet. Can be compiled with the simulation in Modelsim.
Date : 2025-06-12 Size : 994kb User : TSH
stopwatch Downloaded：0: Realize stopwatch on FPGA, minutes and seconds there are three different display milliseconds. For reference only, not the quality of the code
Date : 2025-06-12 Size : 1.28mb User :
led_flash Downloaded：0: A simple water lamps designed for Verilog entry students practice how to make simple hardware description language
Date : 2025-06-12 Size : 596kb User :
my_alu Downloaded：0: A simple ALU program designed to achieve the following functions: logic operations: AND, OR, NOT, XOR logical left, logical shift right arithmetic operations: addition, subtraction
Date : 2025-06-12 Size : 580kb User :
Serial_Adder Downloaded：0: Note: It is verilog language to write a bit full adder, to achieve four-digit serial adder, a clock can be completed once a bit full adder
Date : 2025-06-12 Size : 521kb User :
time_test Downloaded：0: Use 10M clock cycle design a single cycle waveform shape. This is written in Verilog
Date : 2025-06-12 Size : 536kb User : 猪肉先生
XC3S400TQ144 Downloaded：0: Just little program for xilinx FPGA. It is can be used as a example for education.
Date : 2025-06-12 Size : 311kb User : Ruslan
Key_Filter Downloaded：0: Verilog language used to write programs eliminate jitter button
Date : 2025-06-12 Size : 1kb User : miaoyang
Lvds_lattice Downloaded：0: This is based on ttl 24bits lattice fpga chip (rgb888) module. Easy to understand and modify the output resolution is only need to change a few lines of macro definitions. The whole project file is compiled to run on dia
Date : 2025-06-12 Size : 369kb User : xie
spi_slave_lattice Downloaded：0: This based on lattice fpga do spi slave module. Easy to understand for beginners. The code using a state machine description. The whole project is run diamond2.0 version of the compiler.
Date : 2025-06-12 Size : 1.21mb User : xie
Intel8080_lattice Downloaded：0: Based lattice fpga chip intel8080 bus module, easy to understand for beginners. The project runs diamond2.0 version of the compiler.
Date : 2025-06-12 Size : 322kb User : xie

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