VHDL-FPGA-Verilog List Page 392

VHDL-FPGA-Verilog list

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uart_lvds Downloaded：0: fpga for uart based on verilog
Date : 2025-06-12 Size : 3.66mb User : wu yue
LCD12864-for-chinese-verilog Downloaded：0: lcd for chinese based on verilog——code example
Date : 2025-06-12 Size : 92kb User : wu yue
sdram_ctrl1 Downloaded：0: design for sdram control
Date : 2025-06-12 Size : 5kb User : dsj
YCbCr2RGB Downloaded：0: RGB and YCbCr color space can be transformed into each other
Date : 2025-06-12 Size : 602kb User : 陈祥
DigitalClock Downloaded：0: digital led
Date : 2025-06-12 Size : 3.45mb User : lizhichao
2fsk_2psk Downloaded：0: FSK and PSK modulation, VHDL language, and has been through simulation.
Date : 2025-06-12 Size : 1.11mb User : hbxgwjl
M_generation Downloaded：0: Pseudo-random sequence generator, VHDL language completed, through simulation.
Date : 2025-06-12 Size : 2.2mb User : hbxgwjl
PWM Downloaded：0: PWM controller design based on FPGA, including ADC0820 module, key scan, PID, PWM controllers and other modules, VHDL language completed, through simulation
Date : 2025-06-12 Size : 769kb User : hbxgwjl
taxi Downloaded：0: FPGA design is based on the taxi meter, VHDL language completion, through simulation available.
Date : 2025-06-12 Size : 570kb User : hbxgwjl
boxingfashengqi Downloaded：0: Waveform generator source code, sine, triangle, sawtooth, square wave. modelsim simulation, testbench simulation code contains, verilog write testbench use, waveform generator VHDL source code used to write.
Date : 2025-06-12 Size : 4.53mb User : hbxgwjl
ISE_lab1 Downloaded：0: Staff FPGA program for learning basic gates of FPGA
Date : 2025-06-12 Size : 395kb User : 岳宇博
ISE_lab3 Downloaded：0: Multiplexer FPGA source code
Date : 2025-06-12 Size : 353kb User : 岳宇博

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