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VHDL-FPGA-Verilog list
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chap3
Downloaded:0
Some simple model of verilog code, very helpful for learning
Date
: 2025-07-22
Size
: 5kb
User
:
袁科学
chap5
Downloaded:0
Some simple model of verilog code, very helpful for learning
Date
: 2025-07-22
Size
: 5kb
User
:
袁科学
standard
Downloaded:0
CPU example from Altera. it is very usefull
Date
: 2025-07-22
Size
: 1.57mb
User
:
FPGA
ADC0809VHDLcontrol
Downloaded:0
Based on the VHDL language, to achieve simple control of the ADC0809.
Date
: 2025-07-22
Size
: 3kb
User
:
xiaokun
EDA
Downloaded:0
EDA digital electronic clock curriculum design. Clock automatic timing, and timing data will be sent to the display tube display.
Date
: 2025-07-22
Size
: 5kb
User
:
xiaokun
7segmentLED
Downloaded:0
7 segment LED display source code. Based on the VHDL language, achieving seven segment LED display.
Date
: 2025-07-22
Size
: 3kb
User
:
xiaokun
BCD
Downloaded:0
Based on the VHDL language, to achieve a binary code is converted to BCD.
Date
: 2025-07-22
Size
: 3kb
User
:
xiaokun
4LED
Downloaded:0
Based on the VHDL language, to realize four digital tube display.
Date
: 2025-07-22
Size
: 3kb
User
:
xiaokun
ethmac_latest
Downloaded:0
Ethernet MAC, has been tested in more detail, see README
Date
: 2025-07-22
Size
: 912kb
User
:
tz
6fifo
Downloaded:0
It is very useful for student who study omnet++.
Date
: 2025-07-22
Size
: 475kb
User
:
刘小玉
Firewall
Downloaded:0
Hardware firewall, verilog writing, has been tested
Date
: 2025-07-22
Size
: 601kb
User
:
tz
ZBT_SRAM
Downloaded:0
Describes how to use the PGA control of SRAM, with the Verilog language
Date
: 2025-07-22
Size
: 163kb
User
:
李丽
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