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  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 1.57mb
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Introduction - If you have any usage issues, please Google them yourself
CPU example from Altera. it is very usefull
Packet file list
(Preview for download)
standard\altpllpll.ppf
........\altpllpll.vhd
........\button_pio.vhd
........\constraints_out.txt
........\cpu.ocp
........\cpu.sdc
........\cpu.vhd
........\cpu_ic_tag_ram.mif
........\cpu_jtag_debug_module_sysclk.vhd
........\cpu_jtag_debug_module_tck.vhd
........\cpu_jtag_debug_module_wrapper.vhd
........\cpu_mult_cell.vhd
........\cpu_ociram_default_contents.mif
........\cpu_oci_test_bench.vhd
........\cpu_rf_ram_a.mif
........\cpu_rf_ram_b.mif
........\cpu_test_bench.vhd
........\ddr_pll_cycloneii.ppf
........\ddr_pll_cycloneii.vhd
........\ddr_sdram_0.cmp
........\ddr_sdram_0.html
........\ddr_sdram_0.ppf
........\ddr_sdram_0.vhd
........\ddr_sdram_0_auk_ddr_clk_gen.vhd
........\ddr_sdram_0_auk_ddr_datapath.vhd
........\ddr_sdram_0_auk_ddr_datapath_pack.vhd
........\ddr_sdram_0_auk_ddr_dqs_group.vhd
........\ddr_sdram_0_auk_ddr_sdram.vhd
........\ddr_sdram_0_ddr_settings.txt
........\ddr_sdram_0_estimated_data.dat
........\ddr_sdram_0_example_driver.vhd
........\ddr_sdram_0_extraction_data.txt
........\ddr_sdram_0_extraction_log.txt
........\ddr_sdram_0_extraction_log2.txt
........\ddr_sdram_0_post_summary.txt
........\ddr_sdram_0_pre_compile_ddr_timing_summary.txt
........\ddr_sdram_controller-library
........\............................\auk_ddr2_init.ocp
........\............................\auk_ddr2_init.vhd
........\............................\auk_ddr_avalon_if.vhd
........\............................\auk_ddr_bank_details.vhd
........\............................\auk_ddr_controller.vhd
........\............................\auk_ddr_functions.vhd
........\............................\auk_ddr_init.ocp
........\............................\auk_ddr_init.vhd
........\............................\auk_ddr_input_buf.vhd
........\............................\auk_ddr_tb_functions.vhd
........\............................\auk_ddr_timers.vhd
........\............................\example_lfsr8.v
........\............................\example_lfsr8.vhd
........\epcs_controller.vhd
........\epcs_controller_boot_rom.hex
........\estimated_data.txt
........\high_res_timer.vhd
........\incremental_db
........\..............\compiled_partitions
........\..............\...................\NiosII_cycloneII_2c35_standard.root_partition.map.kpt
........\..............\README
........\jtag_uart.vhd
........\lcd_display.vhd
........\led_pio.vhd
........\NiosII_cycloneII_2c35_standard.asm.rpt
........\NiosII_cycloneII_2c35_standard.done
........\NiosII_cycloneII_2c35_standard.fit.rpt
........\NiosII_cycloneII_2c35_standard.fit.smsg
........\NiosII_cycloneII_2c35_standard.fit.summary
........\NiosII_cycloneII_2c35_standard.flow.rpt
........\NiosII_cycloneII_2c35_standard.jdi
........\NiosII_cycloneII_2c35_standard.map.rpt
........\NiosII_cycloneII_2c35_standard.map.summary
........\NiosII_cycloneII_2c35_standard.pin
........\NiosII_cycloneII_2c35_standard.pof
........\NiosII_cycloneII_2c35_standard.qpf
........\NiosII_cycloneII_2c35_standard.qsf
........\NiosII_cycloneII_2c35_standard.qws
........\NiosII_cycloneII_2c35_standard.sof
........\NiosII_cycloneII_2c35_standard.tan.rpt
........\NiosII_cycloneII_2c35_standard.tan.summary
........\NiosII_cycloneII_2c35_standard.vhd
........\NiosII_cycloneII_2c35_standard_assignment_defaults.qdf
........\NiosII_cycloneII_2c35_standard_sopc.bsf
........\NiosII_cycloneII_2c35_standard_sopc.html
........\NiosII_cycloneII_2c35_standard_sopc.ptf
........\NiosII_cycloneII_2c35_standard_sopc.ptf.8.0
........\NiosII_cycloneII_2c35_standard_sopc.ptf.bak
........\NiosII_cycloneII_2c35_standard_sopc.ptf.pre_generation_ptf
........\NiosII_cycloneII_2c35_standard_sopc.qip
........\NiosII_cycloneII_2c35_standard_sopc.sopc
........\NiosII_cycloneII_2c35_standard_sopc.sopcinfo
........\NiosII_cycloneII_2c35_standard_sopc.vhd
........\NiosII_cycloneII_2c35_standard_sopc_clock_0.vhd
........\NiosII_cycloneII_2c35_standard_sopc_generation_script
........\NiosII_cycloneII_2c35_standard_sopc_inst.vhd
........\NiosII_cycloneII_2c35_standard_sopc_log.txt
........\onchip_ram.hex
........\onchip_ram.vhd
........\pll.sdc
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