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VHDL-FPGA-Verilog list
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clock
Downloaded:0
Written in Verilog HDL using electronic clock to achieve some simple functions, including timing, tone, when
Date
: 2025-07-22
Size
: 656kb
User
:
liu
DDS_XHQ
Downloaded:0
Through the FPGA to achieve DDS, generate an arbitrary waveform, this program implements a sine wave frequency adjustable
Date
: 2025-07-22
Size
: 1.63mb
User
:
shiweining
clock
Downloaded:0
The code using verilog language to achieve a 24-hour clock time, hours, minutes, seconds, the clock input 1HZ
Date
: 2025-07-22
Size
: 1kb
User
:
杜海彬
VerilogHDlclock
Downloaded:0
Based on the design of the multi-function digital clock VerilogHDL...
Date
: 2025-07-22
Size
: 60kb
User
:
杜海彬
Verilog
Downloaded:0
this is a samll book which have introduce the verilog very detail
Date
: 2025-07-22
Size
: 199kb
User
:
洪依
FPGA
Downloaded:0
Learnado Spectrum for simulation software
Date
: 2025-07-22
Size
: 9.15mb
User
:
suresh
WAVE6000
Downloaded:0
VHDL language design based on a full-duplex UART circuit, the main modules: module baud rate, data transmission module, the data receiver module.
Date
: 2025-07-22
Size
: 2.44mb
User
:
李思龙
Altera_Verilog_Coding_Style_Proposal_final
Downloaded:0
Altera' s Verilog code specifications, explanations can also be
Date
: 2025-07-22
Size
: 1.76mb
User
:
Zheng
CPU
Downloaded:0
MIPS like CPU using verilog
Date
: 2025-07-22
Size
: 17kb
User
:
yk
counter
Downloaded:0
This is a simple Counter
Date
: 2025-07-22
Size
: 1kb
User
:
Yaniv
vc
Downloaded:0
virtul channel virtual channel used to improve the effect of noc Deadlock
Date
: 2025-07-22
Size
: 11kb
User
:
长华
hw8
Downloaded:0
Vending machine in the classic Verilog source code, including test procedures
Date
: 2025-07-22
Size
: 45kb
User
:
萧晓
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