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VHDL-FPGA-Verilog list
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Written in Verilog HDL using electronic clock to achieve some simple functions, including timing, tone, when
Date : 2025-07-22 Size : 656kb User : liu

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Through the FPGA to achieve DDS, generate an arbitrary waveform, this program implements a sine wave frequency adjustable
Date : 2025-07-22 Size : 1.63mb User : shiweining

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The code using verilog language to achieve a 24-hour clock time, hours, minutes, seconds, the clock input 1HZ
Date : 2025-07-22 Size : 1kb User : 杜海彬

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Based on the design of the multi-function digital clock VerilogHDL...
Date : 2025-07-22 Size : 60kb User : 杜海彬

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this is a samll book which have introduce the verilog very detail
Date : 2025-07-22 Size : 199kb User : 洪依

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Learnado Spectrum for simulation software
Date : 2025-07-22 Size : 9.15mb User : suresh

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VHDL language design based on a full-duplex UART circuit, the main modules: module baud rate, data transmission module, the data receiver module.
Date : 2025-07-22 Size : 2.44mb User : 李思龙

Altera' s Verilog code specifications, explanations can also be
Date : 2025-07-22 Size : 1.76mb User : Zheng

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MIPS like CPU using verilog
Date : 2025-07-22 Size : 17kb User : yk

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This is a simple Counter
Date : 2025-07-22 Size : 1kb User : Yaniv

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virtul channel virtual channel used to improve the effect of noc Deadlock
Date : 2025-07-22 Size : 11kb User : 长华

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Vending machine in the classic Verilog source code, including test procedures
Date : 2025-07-22 Size : 45kb User : 萧晓
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