VHDL-FPGA-Verilog List Page 2939

VHDL-FPGA-Verilog list

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ringcounter Downloaded：0: a ringcounter example
Date : 2025-11-19 Size : 290kb User : guo zhong
seg_led_display Downloaded：0: Digital tube light control applications, dynamic scanning process. Hardware connection is rather special, separate control of Choice, but also a cascade. 6 digital control.
Date : 2025-11-19 Size : 3kb User : lichenlin
six_led_display Downloaded：0: Digital tube light control applications, dynamic scanning process. Hardware connection is rather special, separate control of Choice, but also a cascade. 6 digital control.
Date : 2025-11-19 Size : 3kb User : lichenlin
FPGA_verilog Downloaded：0: FPGA verilog
Date : 2025-11-19 Size : 1.22mb User : 安
8B10BEncodeDecode Downloaded：0: FPGA-based 8B10B decoding process, encode and decode files containing
Date : 2025-11-19 Size : 128kb User :
change Downloaded：0: Synchronous series and the conversion process, a serial input, 8-bit parallel output.
Date : 2025-11-19 Size : 7.82mb User : chuck
ml50x_cpld_design Downloaded：0: erqwrq
Date : 2025-11-19 Size : 14kb User : anhaiyang
serial_bus Downloaded：0: xilinx serial bus reference design, the company mainly for Xilinx devices, the serial bus of the developers who have a very good reference value.
Date : 2025-11-19 Size : 6kb User : 关几行
TestFre Downloaded：0: By the clock frequency, pulse width modulated using PWM to control LED brightness light intensity, changes in PWM duty cycle to achieve constant current LED brightness intensity control
Date : 2025-11-19 Size : 1kb User : 常云飞
VHDLpaomadeng Downloaded：0: Through the VHDL language to achieve similar Marquee control, transfer through the high level to achieve the transfer of light, using QuartusII development platform
Date : 2025-11-19 Size : 1kb User : 常云飞
RGB Downloaded：0: RGB red green and blue light that, by the order of three light colored marquees light up function can be achieved, which added a little pause, if the intensity ratio of the right words, but also issued a white
Date : 2025-11-19 Size : 1kb User : 常云飞
VHDLfangbo Downloaded：0: VHDL language through a square wave, the code will contain two processes, a frequency of a square wave output. Which contains two code, you can reference as needed
Date : 2025-11-19 Size : 1kb User : 常云飞

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