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VHDL-FPGA-Verilog list
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lcd_time
Downloaded:0
A VHDL-based design of multi-functional digital clock that can display time in the LCD, adjust the time, the whole point of time, music was wonderful Butterfly Lovers.
Date
: 2025-11-19
Size
: 192kb
User
:
周殿凤
ledplay
Downloaded:0
VHDL-based light display a variety of water, the program simple and less resource
Date
: 2025-11-19
Size
: 213kb
User
:
周殿凤
lcd_move
Downloaded:0
VHDL-based LCD dynamic display, complete Quartusii programming, a good helper for beginners entry, readers can use to open
Date
: 2025-11-19
Size
: 279kb
User
:
周殿凤
speaker
Downloaded:0
VHDL-based music concert circuit, complete Quartusii programming, tested a total success, a good helper for beginners entry, readers can use to open
Date
: 2025-11-19
Size
: 41kb
User
:
周殿凤
bianpincs
Downloaded:0
A frequency conversion process, after the button press can gradually change frequency, until stable
Date
: 2025-11-19
Size
: 154kb
User
:
周殿凤
RCServo
Downloaded:0
CONTROLLER RCSERVO MOTOR
Date
: 2025-11-19
Size
: 1kb
User
:
yang
b16
Downloaded:0
Verilog implementation of a 16-bit stack-based processor to realize the 32 instructions, fpga implementation frequency of 26Mhz!
Date
: 2025-11-19
Size
: 2kb
User
:
JOY
uart16
Downloaded:0
A 16-bit uart, serial communication can be achieved, accept or send data!
Date
: 2025-11-19
Size
: 1kb
User
:
JOY
ctc16
Downloaded:0
A timer/counter, which implements two timer counters, each of which can be written mode controller to achieve the function of time or the time!
Date
: 2025-11-19
Size
: 1kb
User
:
JOY
divideVerilog
Downloaded:0
fast divide\
Date
: 2025-11-19
Size
: 16kb
User
:
张逸臣
cordicalgorithm
Downloaded:0
this zip file contains some details which details how to use coredic algorithm to implement trigonometric functions
Date
: 2025-11-19
Size
: 2.76mb
User
:
nmamatha
mamta
Downloaded:0
the zip file i have uploaded has some testbenches in vhdl for sqare root,sum,subtract
Date
: 2025-11-19
Size
: 3kb
User
:
nmamatha
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