VHDL-FPGA-Verilog List Page 2934

VHDL-FPGA-Verilog list

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dds Downloaded：0: Under the DDS in quartus design, Verilog language, you can produce sine wave, triangle wave, square wave, frequency adjustable.
Date : 2025-11-19 Size : 2.51mb User : 米多
SPI_Bridge_Design_Example Downloaded：0: Based on ALTERA' s nios2 the SPI communication, the document contains the entire project, including master-slave mode, a good reference.
Date : 2025-11-19 Size : 276kb User : 米多
fft_st Downloaded：0: FFT with NIOS2 nuclear construction projects, to input data on FFT or IFFT transform.
Date : 2025-11-19 Size : 43.13mb User : 米多
QAM16_Demapping Downloaded：0: Solution 16qam with VERILOG. Originally designed for OFDM, it has some reference value. -Solutions 16qam with VERILOG written procedures.
Date : 2025-11-19 Size : 150kb User : 米多
SD Downloaded：0: SD datasheet basic mini sdhc
Date : 2025-11-19 Size : 481kb User : rayfelipe
fpga_usb_serial_20091006.tar Downloaded：0: USB2.0 free sources
Date : 2025-11-19 Size : 213kb User : goodbegun
McGraw_Hill_-_VHDL.Programming.by.Example.4th.Ed. Downloaded：0: ebook of VHDL programming for beginners
Date : 2025-11-19 Size : 1.7mb User : sravya
Hardware_development_VHDL8_bit_asynchronous_counte Downloaded：0: Hardware development VHDL8 bit asynchronous counter of a course design Hardware development VHDL8 bit asynchronous counter
Date : 2025-11-19 Size : 157kb User : yuqa
I2CMaster Downloaded：0: I2C control interface, an implementation of control procedures has been verified by simulation and can be directly called
Date : 2025-11-19 Size : 5kb User : 肖豪
e1_framer Downloaded：0: E1 DeFramer :A design for Framing Telecom E1 Interface
Date : 2025-11-19 Size : 18kb User : ebi
hdbn Downloaded：0: HDBN VHDL Project includes hdb3 & hdbn
Date : 2025-11-19 Size : 194kb User : ebi
sseg Downloaded：0: vhdl codefor 7 segment display
Date : 2025-11-19 Size : 1kb User : keshav

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