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VHDL-FPGA-Verilog list
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MAXII_DWM_200803
Downloaded:0
Analog camera signal input of the full FPGA design circuits, has a very good reference value.
Date
: 2025-11-19
Size
: 486kb
User
:
林方
FPGA
Downloaded:0
fpga from scratch, it is the classic example, through the FPGA to achieve some of the basic functions!
Date
: 2025-11-19
Size
: 11.58mb
User
:
wug
iso_rfid_send
Downloaded:0
15693 protocol to send the module, to complete the data transmission, and in certain circumstances to send error commands, single function, you can complete the 16-bit data transmission.
Date
: 2025-11-19
Size
: 427kb
User
:
雍振强
fifo
Downloaded:0
Realized in fpga fifo, with digital display, study and reference purposes only
Date
: 2025-11-19
Size
: 426kb
User
:
郝强
liushuimux
Downloaded:0
In order to improve the frequency, fpga often used in assembly line and other techniques, the code implements the multiplication pipeline mode
Date
: 2025-11-19
Size
: 290kb
User
:
郝强
uart
Downloaded:0
Debug Assistant is achieved using serial pc machine and fpga serial communication function, the program annotated.
Date
: 2025-11-19
Size
: 100kb
User
:
郝强
FFT.vhdl
Downloaded:0
FFT algorithm to implement FFT chip.
Date
: 2025-11-19
Size
: 5kb
User
:
toon
ssKEY
Downloaded:0
To do with the combination lock logic
Date
: 2025-11-19
Size
: 1kb
User
:
付书获
wingtheory
Downloaded:0
Wing and airfoil theory, the derivation process is complete, relevant information in Chinese is relatively rare, more precious!
Date
: 2025-11-19
Size
: 2.28mb
User
:
策划家
AD
Downloaded:0
With FPGAZUO a 32 AD procedures, written with VERLlog
Date
: 2025-11-19
Size
: 8.66mb
User
:
付书获
NIOSII
Downloaded:0
This document NiosII debugging process for the common problems and the NiosII developers have very good help
Date
: 2025-11-19
Size
: 179kb
User
:
杨海宁
SignalTapII
Downloaded:0
This document for detailed use method of logic analyzers, debugging is very helpful
Date
: 2025-11-19
Size
: 1.07mb
User
:
杨海宁
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