VHDL-FPGA-Verilog List Page 245

VHDL-FPGA-Verilog list

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Vivado--设计流程指导手册-(含安装流程与仿真) Downloaded：0: Vivado design flow guidance document, which contains software installation process and simulation process
Date : 2025-05-25 Size : 3.02mb User : bikey
新建文件夹 Downloaded：0: Verilog voice, FPGA produces DE, HS, VE signal
Date : 2025-05-25 Size : 1kb User : 小麦穗
trafficlight Downloaded：0: North South four road traffic lights
Date : 2025-05-25 Size : 5.78mb User : 云白三
smg_IP Downloaded：0: In the DE 2 development board, the preparation of VHDL language, the establishment of 8 sections of digital tube IP kernel, in Nios II written in C language program, to achieve the 8 section of digital tube digital displ
Date : 2025-05-25 Size : 9.09mb User : nsl123asd
UART-HPY Downloaded：0: a useful UART decoder and encoder.
Date : 2025-05-25 Size : 47kb User : 帕萨迪纳
cordic Downloaded：0: Generating sin or cos function
Date : 2025-05-25 Size : 11.22mb User : ixupeng
FFT64DIF Downloaded：0: Achieve fast Fourier operations at 64 points, and use Modelsim, matlab simulation.
Date : 2025-05-25 Size : 19.74mb User : chenmm
hua Downloaded：0: The AD7810 controller written by Verilog has been verified by simulation
Date : 2025-05-25 Size : 2kb User : jxxymm
uart Downloaded：0: Embedded serial communication, written using Verilog, altera development board on the run
Date : 2025-05-25 Size : 2.71mb User : 歪歪mao
LIUXISOPC2 Downloaded：0: calculator SOPC FPGA
Date : 2025-05-25 Size : 42.84mb User : 刘栖123
ModelCPU Downloaded：0: The framework code that contains model machine design can be added manually
Date : 2025-05-25 Size : 1kb User : 胡佳华
ethernet_test Downloaded：0: Gigabit Ethernet communication based on FPGA, communication using GMII bus communication
Date : 2025-05-25 Size : 11.28mb User : lj120809769

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