VHDL-FPGA-Verilog List Page 2318

VHDL-FPGA-Verilog list

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alu Downloaded：0: the 8 bit alu by verilog
Date : 2025-11-23 Size : 89kb User : pedram
alu2 Downloaded：0: verilog alu 8bit for engineers
Date : 2025-11-23 Size : 89kb User : pedram
verilogexample Downloaded：0: verilog learning materials. Source code with a simple Lie Zi, and simulation can be used directly.
Date : 2025-11-23 Size : 163kb User :
uart2iic Downloaded：0: uart2iic using - Verilog source for I2C module
Date : 2025-11-23 Size : 3kb User : sik
i2c Downloaded：0: I2c serial bus protocol
Date : 2025-11-23 Size : 4kb User : sik
ofdm_vhdl Downloaded：0: The VHDL code for OFDM, ofdm_vhdl documents, including fft, ifft other modules, can get the results correctly
Date : 2025-11-23 Size : 29kb User : 陈敏
cnt10.vhd Downloaded：0: Design of a 10-N synchronous counter, with a clear end, a carry output. (If you change the hex, it should be as Any amendment to the procedure) Divided into synchronous and asynchronous counter counter counter two, is a
Date : 2025-11-23 Size : 1kb User : chenguoxian
DS1302_NIOSII Downloaded：0: nios ii soft ds1302（spi） bus driver functions and function declaration
Date : 2025-11-23 Size : 2kb User : 刘全义
IIC_NIOSII Downloaded：0: NIOS II soft-core based on the IIC (analog I/O port) bus driver
Date : 2025-11-23 Size : 2kb User : 刘全义
LCD12864_NIOSII Downloaded：0: NIOS II soft core based LCD driver LCD12864
Date : 2025-11-23 Size : 1kb User : 刘全义
tel Downloaded：0: fpga-verilog telephone billing system to achieve
Date : 2025-11-23 Size : 16kb User : 刘全义
clock Downloaded：0: Verilog language based fapa application multifunction digital clock
Date : 2025-11-23 Size : 480kb User : 刘全义

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