VHDL-FPGA-Verilog List Page 2316

VHDL-FPGA-Verilog list

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DSP_INTERFACE Downloaded：0: The Interface of DSP to FPGA
Date : 2025-11-23 Size : 2kb User : 火炎
CPLDMod2 Downloaded：0: CCD drive control program is based on a number of FPGA implementation
Date : 2025-11-23 Size : 18.89mb User : 晓dawn
FIR_filter Downloaded：0: Parallel FIR filter example. It is low-pass filter for CPLD or FPGA platforms. Project compiled and simulated in Modelsim
Date : 2025-11-23 Size : 232kb User : Serg
LED_RTC Downloaded：0: Read and set the RTC, the time displayed on the digital
Date : 2025-11-23 Size : 6kb User : wf
KEY_PC Downloaded：0: Receiving standard keyboard input and displays the results on the PC
Date : 2025-11-23 Size : 4kb User : wf
KEY_LED Downloaded：0: Accept the standard keyboard input, and print to the LED via the serial port on
Date : 2025-11-23 Size : 4kb User : wf
DA Downloaded：0: By DA output square wave, frequency adjustable, 1K ~ 10KHz, step 1K
Date : 2025-11-23 Size : 7kb User : wf
ANS Downloaded：0: Press SW3/SW4/SW5 start Responder, Responder Responder results after the digital display, the countdown stops.
Date : 2025-11-23 Size : 5kb User : wf
diggital-logic-course-design Downloaded：0: With MAX+ PLUSII curriculum design of digital logic of new ideas, so that digital logic design becomes more streamlined and efficient program
Date : 2025-11-23 Size : 342kb User : lili
21POINT.tar Downloaded：1: 21-point game of the FPGA implementation
Date : 2025-11-23 Size : 318kb User : heiscsy
orcad_tutor Downloaded：0: A CODE FOR EDGE DETECTION IN FPGA
Date : 2025-11-23 Size : 1.43mb User : seher
key_music Downloaded：0: Simple hardware keyboard In the development of board achieve a simple keyboard, press KEY1 ~ KEY7 seperately DO, the alto RE, MI, FA, SOL, LA, SI Hold KEY8 press again KEY7 seperately KEY1 ~ the treble DO, RE, MI, FA, SO
Date : 2025-11-23 Size : 10kb User : 罗文

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