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[VHDL-FPGA-Verilog] yiweiDCTbianhuan

Description: 一维DCT变换的Verilog HDL源程序，在ISE中已经通过编译，可以参考里面的文档。-One-dimensional DCT transform Verilog HDL source code, in the ISE has been through the compilation, you can refer to inside the document.
Platform: | Size: 421888 | Author: 匡匡 | Hits:

[VHDL-FPGA-Verilog] CFO_Correction

Description: 载波频率同步Verilog程序 基于xilinx ise 实现-Carrier frequency synchronization Verilog program is based on xilinx ise to achieve
Platform: | Size: 412672 | Author: sunk | Hits:

[Other] sdr_sdram_control

Description: 一个SDRAM控制器，verilog语言设计，并在ISE上仿真实现。（内部包含多个verilog程序）-sdram-controller,use verilog langguage,it s run sucessfull
Platform: | Size: 162816 | Author: 李丽 | Hits:

[Other] AM_VHDL

Description: AM Demodulator using VHDL for Xilinx FPGA. ISE software
Platform: | Size: 6144 | Author: ali | Hits:

[Other Embeded program] keygen

Description: ISE 9.2 serials working
Platform: | Size: 15360 | Author: asdpol | Hits:

[VHDL-FPGA-Verilog] Processor_alu

Description: this Code is in verilog HDL. This Code is for piplined processor with 4 opcode. this will work in three cycle latch, decode and exicute.. test bench for xilinx ise is laos given
Platform: | Size: 4096 | Author: Yogesh PAtel | Hits:

[VHDL-FPGA-Verilog] A8255V4

Description: A8255.ZIP contains code that implement a modified 8255 Peripherial Port Controller. The code is written in verilog and project is made for XILINX ISE.
Platform: | Size: 540672 | Author: asimlink | Hits:

[Software Engineering] lcd_controller

Description: LCD controller 320x240 XC95144, building Xilinx ISE 6.0 Platform VHDL.
Platform: | Size: 4448256 | Author: Meke | Hits:

[VHDL-FPGA-Verilog] IDCT

Description: 用verilog HDL语言编写的IDCT程序，可以计算8*8的整形数矩阵，用ISE 9.1i编译通过-Using verilog HDL language of the IDCT program can calculate the number of 8* 8 matrix of plastic, with ISE 9.1i compiled by
Platform: | Size: 479232 | Author: 阿文 | Hits:

[VHDL-FPGA-Verilog] Xilinx_FPGA_tutorial

Description: Xilinx ISE软件使用实例 Foundation入门 参数编辑 设计管理器/设计流程向导 FPGA editor 底层编辑器(floorplanner) 硬件调试器（hardware debuger) JTAG编程（JTAG Programmer) LogiBLOX 　 　 Xilinx FPGA设计进阶 FPGAexpress的使用 Vertex器件结构 层次设计和同步电路设计 HDL设计 时间参数 底层编辑-Xilinx ISE Software Foundation started an instance parameter editing Design Manager/Design Flow Wizard underlying FPGA editor editor (floorplanner) hardware debugger (hardware debuger) JTAG programming (JTAG Programmer) LogiBLOX Xilinx FPGA designs using advanced FPGAexpress hierarchy of Vertex device design and synchronization circuit design parameters of the underlying HDL design time editing
Platform: | Size: 5903360 | Author: lurker | Hits:

[Other] eetop[1].cn_ise_book

Description: Xilinx ISE 9.x fpga&cpld设计指南 光盘附带内容
Platform: | Size: 3807232 | Author: 罗德文 | Hits:

[Books] ise11tut

Description: ISE教程 详细的说明了ISE11.1的使用 是初学ISE的好帮手-ISE XILINX
Platform: | Size: 3070976 | Author: 苏文天 | Hits:

[VHDL-FPGA-Verilog] DES

Description: 在ISE平台上，利用Verilog编程实现数据的DES加密-In the ISE platform, using Verilog programming DES data encryption
Platform: | Size: 661504 | Author: ldh | Hits:

[Other] IMM

Description: （交互式多模型算法）目标跟踪程序,java语言编写，包含了kalman滤波。这种方法的特点是在各模型之间“转换”，自动调节滤波带宽，和适合机动目标的跟踪。可以直接调用，附有示例代码-A multi-target tracking toolbox based on the MTT Library of the InstantVision ISE with expanded functionality and tools for off-line design, analysis and testing. The toolbox contains the implementation of distance calculation methods (e.g. city-block based), data assignment and association strategies (e.g. ENN and JVC), state prediction filters (e.g. IMM) with video marking and debugging tools in order to support a complex multi-target tracking system design.
Platform: | Size: 14336 | Author: june | Hits:

[VHDL-FPGA-Verilog] LD

Description: verilog语言实现LD灯的轮流点亮，下载到板子，验证了的。下载即可在ISE中实现仿真。-verilog language LD lights turn lights, downloaded to the board to verify the. Downloads can be realized in the ISE simulation.
Platform: | Size: 2658304 | Author: ll | Hits:

[Linux-Unix] Xilinx_Speedway_EDK11

Description: TRAINING ISE XILINX 11.1-TRAINING ISE XILINX 11.1
Platform: | Size: 23839744 | Author: THEZOOZ | Hits:

[Linux-Unix] Xilinx_ISE_FPGA

Description: TRAININ xilinx ISE 11.1-TRAININ xilinx ISE 11.1
Platform: | Size: 43082752 | Author: THEZOOZ | Hits:

[VHDL-FPGA-Verilog] DSB3

Description: 利用ISE软件编写的Verilog程序，可以进行信号的双边带调制-Using ISE software program written in Verilog, can be bilateral with a modulation signal
Platform: | Size: 942080 | Author: 蜡笔 | Hits:

[VHDL-FPGA-Verilog] MyDDS

Description: 利用查找表法编写的DDS的verilog程序，节省了利用IP核实现需要的资源，软件为ISE，-Prepared using look-up table method of verilog DDS program, save the use of IP core implementation requires resources, software for the ISE,
Platform: | Size: 2891776 | Author: 蜡笔 | Hits:

[VHDL-FPGA-Verilog] Kaifang

Description: 利用ISE编写的实现开方功能的verilog程序，利用了CORDICIP核，可以完成开方功能-Prepared using ISE verilog program to achieve prescribing functions, using the CORDICIP nuclear, prescribing functions to be completed
Platform: | Size: 421888 | Author: 蜡笔 | Hits:
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