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[VHDL-FPGA-Verilog] keyscan_test

Description: 针对机械式按键存在的抖动问题，用verilog HDL编写了一个采用防抖方案并对按键次数计数的模块，已经在ISE综合通过！-Keys exist for mechanical jitter, with verilog HDL prepared a program with anti-shake button and count the number of modules have been integrated by ISE!
Platform: | Size: 1024 | Author: tyut | Hits:

[matlab] ISE

Description: 基于ISE软件的使用说明,一看就会使用这个软件-ISE software-based instructions, a look will be using this software
Platform: | Size: 13549568 | Author: yz | Hits:

[Software Engineering] XISE.DS_Lic.Gen

Description: ise webpack 11.i licgen to generate ise license
Platform: | Size: 1989632 | Author: ddn | Hits:

[Other] XilinxISEModelSim

Description: 基于Xilinx+ISE+& +ModelSim,介绍xilinx的开发流程，包括ISE，Modelsim工具的使用-Xilinx ISE ModelSim
Platform: | Size: 824320 | Author: 董志疆 | Hits:

[VHDL-FPGA-Verilog] SwitchLed

Description: FPGA入门程序。适合编程初学者的学习。由开关控制LED灯的亮灭。ISE集成开发环境。Verilog HDL语言编写-FPGA entry procedures. Programming for beginners to learn. LED lights from the light switch control off. ISE Integrated Development Environment. Language Verilog HDL
Platform: | Size: 244736 | Author: 李海波 | Hits:

[Software Engineering] vga-ise

Description: 用quartus实现vga的一个显示程序，具体功能为显示一串字母ise-Quartus achieved with a vga display program, the specific function to display a bunch of letters ise
Platform: | Size: 3072 | Author: cheng | Hits:

[ELanguage] QPSK_modulator_demodulator

Description: Wireless_Communication_FPGA设计代码之一：QPSK调制解调的FPGA实现 将相应的源文件复制到本地硬盘上，修改属性为可写，然后在ISE环境中新建工程，然后添加相应的源文件即可。-Wireless_Communication_FPGA one of the design code: QPSK modulation and demodulation of the FPGA to achieve the corresponding source files to local hard disk, modify the property is writable, then in the ISE environment, new construction, and then add the appropriate source files.
Platform: | Size: 1024 | Author: 松松 | Hits:

[Multimedia program] VGA

Description: VGA 640x480 controller using FPGA Xilinx using Xilinx ISE 10
Platform: | Size: 1024 | Author: Odair | Hits:

[Other] ISE7.1

Description: ise 中文使用手册，详细介绍如何使用ise，附大量图片说明-ise Chinese user manual details how to use the ise, attached to a large number of captions
Platform: | Size: 277504 | Author: xinghuo | Hits:

[VHDL-FPGA-Verilog] FPGAdesignandFIRimplementation

Description: 文档中含有DDS的VHDL实现，FIR滤波器串并FPGA实现，synplify,ISE,ModelSim后仿真流程和FPGA设计的资料-document contains DDS implementation with VHDL , FIR filter serial to parallel and FPGA implementation, and synplify, ISE, ModelSim simulation and FPGA design
Platform: | Size: 1383424 | Author: francis davis | Hits:

[VHDL-FPGA-Verilog] vvTutorialonXilinxISE10.1

Description: EGR426 W’09 Laboratory #1 Tutorial on Xilinx ISE 10.1-EGR426 W’09 Laboratory#1 Tutorial on Xilinx ISE 10.1
Platform: | Size: 1252352 | Author: lance | Hits:

[Linux-Unix] mgc_licen(1)

Description: license for ise12.2,最新而且很好用，请放心使用。-license for ise12.2，It s lastest fot ise 12.2,good ease to ues.
Platform: | Size: 387072 | Author: 邵磊 | Hits:

[Delphi VCL] ISE

Description: ISE使用完整版，整个教程128页，非常的详细，值得一看-Use the full version of ISE, the entire tutorial 128 pages, very detailed, worth a visit
Platform: | Size: 4280320 | Author: | Hits:

[VHDL-FPGA-Verilog] IS61WV51216BLL

Description: 备注：使用的是VeriLog HDL语言 软件环境xilinx ISE 10.1，硬件：高教仪EXCD-1FPGA电路板。FPGA信号：spartan-3e . 功能编写硬件描述性语言实现FPGA对板上外设SRAM IS61WV51216BLL的读写，通过串口发送到上位机上，使用串口助手显示读取的数据。-Note: Use the VeriLog HDL language software environment xilinx ISE 10.1, hardware: Higher Miriam EXCD-1FPGA circuit boards. FPGA Signal: spartan-3e. Write functional hardware description language implementation of on-board peripherals SRAM IS61WV51216BLL FPGA to read and write, sent to the host computer through the serial port, use the serial Assistant displays the data read.
Platform: | Size: 5120 | Author: 李钿 | Hits:

[Multimedia Develop] ISim

Description: ISE仿真深度教程。讨论 ISE Simulator和Project Navigato-ISE Simulator(ISim) in-depth,introducing ISE Simulator和Project Navigato
Platform: | Size: 812032 | Author: 王伯马 | Hits:

[DSP program] OFDM_Security

Description: This a Simulink model that demonstrates an algorithm that applies wireless security on physical layer. The demonstration is based on 802.11a (simplified) and receiver is implemented on Xilinx Virtex 4 FPGA. The RAR file inlcudes 2 files: 1. Simulink model 2. initialization file. Software requirements: 1. Matlab, r2007a or later 2. Simulink with DSP and Comm blocksets 3. Xilinx ISE with System Generator for DSP 9.2i or later.
Platform: | Size: 160768 | Author: 徐滨 | Hits:

[VHDL-FPGA-Verilog] rax2

Description: rax2 fft implation the fft in verilog instance and in ise of xilinx it show how to istance fft core and the port used
Platform: | Size: 1024 | Author: LL | Hits:

[VHDL-FPGA-Verilog] Verilog-Design

Description: 包括三个文档: 1.基于Altera Quartus II 的模块化设计应用 2.基于Xilinx ISE的的模块化设计示例 3.模块化设计方法的设计流程-Consists of three documents: 1. Based on Altera Quartus II modular design applications 2. Xilinx ISE based on the modular design of Example 3. Modular Design for design process
Platform: | Size: 252928 | Author: Joseph | Hits:

[VHDL-FPGA-Verilog] XilinxFPGAISEDSPDESIGN(1-60)

Description: 系统讲述了XilinxFPGA的开发知识,包括FPGA开发简介、VerilogHDL语言基础、基于Xilinx芯片的HDL语言高级进阶、ISE开发环境使用指南、FPGA配置-System, the development of knowledge about XilinxFPGA, including the FPGA development profile, VerilogHDL language based on chip-based Xilinx HDL Language Advanced Advanced, ISE development environment, user guide, FPGA configuration ...
Platform: | Size: 11885568 | Author: 林方 | Hits:

[VHDL-FPGA-Verilog] SpiMaster

Description: This a verilog code for SPI Master testbench is also provided spi_top.v Xilinx ISE or Icarus verilog to compile and simulate-This is a verilog code for SPI Master testbench is also provided spi_top.v Xilinx ISE or Icarus verilog to compile and simulate
Platform: | Size: 9216 | Author: RutaliMulye | Hits:
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