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Description: 八位并行加法器，同时进位，利用VHDL语言，在ISE环境中建立工程-Eight parallel adder
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Size: 314368 |
Author: blackmo |
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Description: xilinx 中文手册 英文手册 用户使用说明ISE-Description ISE the xilinx Chinese manual English manual user
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Size: 1606656 |
Author: 郑微 |
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Description: step_motor design using verillog ISE
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Size: 1024 |
Author: rizwan |
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Description: 苏州大学的一部很不错的关于飞思卡尔汽车竞赛的编程语言设计介绍的书-this book is very good book written by professors in Suzhou University,which relates to the design of programing by c/c++.
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Size: 10620928 |
Author: 张鹏 |
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Description: 用ISE开发的flash控制器，适合初学者-ISE developed flash controller, suitable for beginners
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Size: 87040 |
Author: yyt |
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Description: ISE开发软件、spantan3e开发板、4*3矩阵键盘控制数码管显示数字，源代码和引脚定义-ISE development software, spantan3e development board, 4 x 3 matrix keyboard control digital display figures, source code and pin definitions
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Size: 1024 |
Author: 旺 |
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Description: ISE开发软件、spartan3e开发板，左右两个按键控制8个发光二极管的左右移动点亮-Eight light-emitting diode the ISE development software, spartan3e, development board, around two button control and move around lit
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Size: 10240 |
Author: 旺 |
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Description: ise软件使用说明，对ISE软件的掌握非常有帮助。如果你开发xilinx的FPGA,建议下载。-ise software instructions, the ISE software grasp very helpful. If you develop xilinx' s FPGA, it is recommended to download.
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Size: 4517888 |
Author: mmtt |
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Description: ISE Design Suite Software Manuals and
Help - PDF Collection,ISE 软件手册以及帮助。-ISE Design Suite Software Manuals and Help- PDF Collection, ISE software manuals as well as help.
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Size: 182272 |
Author: mmtt |
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Description: ISim User Guide，ISE仿真模块用户说明书，对使用ISE进行方针的用户有帮助。-ISim User Guide, ISE simulation module user manual, user ISE approach.
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Size: 1227776 |
Author: mmtt |
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Description: PCI9656 的控制，ISE 12.2，verilog编写，slave模式-PCI9656，verilog，ISE 12.2，using verilog，SLAVE mode
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Size: 4754432 |
Author: 王敏生 |
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Description: 在ise环境下，用vorilog hdl语言实现全加器算法-To achieve full adders algorithm ise environment, vorilog hdl language
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Size: 16384 |
Author: 谭健 |
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Description: 基于XILINX+ISE的通用串行总线设计-Design based on the Universal Serial Bus XILINX+ISE
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Size: 23552 |
Author: sun |
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Description: 基于XILINX+ISE+14.1的usb协议设计-Usb protocol design based on XILINX+ISE+14.1
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Size: 140288 |
Author: sun |
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Description: ise教程,Xilinx FPGA/CPLD设计手册 Xilinx公司推荐FPGA/CPLD培训手册-ise for Xilinx FPGA/CPLD
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Size: 2767872 |
Author: yyan |
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Description: ISE教程2，Xilinx 公司推荐培训FPGA/CPLD培训教材。完整工程文件和设计源文件。-ise code for FPGA/CPLD
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Size: 18633728 |
Author: yyan |
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Description: 在THINPAD平台上的50M时钟5级流水支持THCOMIPS指令集的CPU，并附带8核扩展，内有详细实验报告。全部用VHDL编写，并附有样例验证程序，开发环境为ISE 14.1。-Water support THCOMIPS instruction set CPU 50M clock the THINPAD platform 5 and comes with an 8-core extension, within a detailed test report. All written using VHDL with sample verification process, development environment for ISE 14.1.
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Size: 3151872 |
Author: 莫涛 |
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Description: 用verilog数字钟，并且在ise上验证，可以显示分秒，并且可以对分和秒进行调整-Verilog digital clock, and verified in ise, can display every minute, and you can adjust the minutes and seconds
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Size: 5004288 |
Author: 胡月 |
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Description: 上传的代码是基于Xilinx下的ISE开发平台，用Verilog语言编写的carry_select加法器。-Upload the code is based on the Xilinx ISE development platform, the the Verilog language of carry_select adder.
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Size: 113664 |
Author: 飞扬 |
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Description: 含有常用组合电路模块的设计和应用这个实验所需的VHDL的代码，用modelsim仿真并建立了ISE文件-VHDL code module containing commonly used combination of circuit design and application required by this experiment, the simulation with modelsim and ISE file
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Size: 829440 |
Author: liqunfei |
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