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[Embeded-SCM Develop] Xilinx7-2

Description: Xilinx ISE 官方源代码盘第七章 Part 2 -Xilinx ISE official source disk Chapter VII Part 2
Platform: | Size: 9458688 | Author: guorui | Hits:

[Embeded-SCM Develop] Xilinx_8

Description: Xilinx ISE 官方源代码盘第八章-Xilinx ISE official source was the eighth chapter
Platform: | Size: 1714176 | Author: guorui | Hits:

[Embeded-SCM Develop] Xilinx_9

Description: Xilinx ISE 官方源代码盘第九章-Xilinx ISE official source was the ninth chapter
Platform: | Size: 613376 | Author: guorui | Hits:

[Embeded-SCM Develop] Xilinx_10

Description: Xilinx ISE 官方源代码盘第十章-Xilinx ISE official source was the 10th chapter
Platform: | Size: 7497728 | Author: guorui | Hits:

[VHDL-FPGA-Verilog] pwmvhdl

Description: 一个在xilinx的ise环境下编译仿真成功的pWM程序。-one of the Xilinx environment ideally compiler pWM success of the simulation procedures.
Platform: | Size: 136192 | Author: 马永涛 | Hits:

[VHDL-FPGA-Verilog] keybyise

Description: 一个在xilinx公司ise编译环境下仿真成功的键盘操作程序。-a company embarks on the environment and ideally compile successful simulation keyboard operations.
Platform: | Size: 97280 | Author: 马永涛 | Hits:

[Embeded-SCM Develop] ISE4tut

Description: 是介绍ISE的非常好的教程，好资源共同分享-introduced ISE is a very good guide, a good resource sharing
Platform: | Size: 943104 | Author: 许风 | Hits:

[Other] fpedit

Description: Xilinx FPGA 开发软件ISE中的FPGA Edit使用方法详细介绍-Xilinx FPGA development software ISE FPGA Edit the use of detailed
Platform: | Size: 813056 | Author: sk | Hits:

[VHDL-FPGA-Verilog] VerilogHDLPLI

Description: Verilog HDL的PLI子程序接口，用于与用户C程序在2个方向上传输数据，可用xilinx ISE，quartusii或modelsim仿真，-Verilog HDL PLI subroutine interfaces, for C program with the user in the direction of two transmission of data, available xilinx ISE. quartusii or modelsim simulation,
Platform: | Size: 1024 | Author: 杨锐 | Hits:

[Other Embeded program] yunsuan-verilog

Description: 运算器的实现，即实验指导书中的实验一，文件中包含有原代码及端口设置（可变），用vrilog HDL编程，Xilinx ISE 6仿真，并在实际电路中得到实现．-operations for the realization of the experimental guidance of a book. document contains the original code and port settings (variable), with vrilog HDL programming, Xilinx ISE 6 simulation, and the actual circuit realization.
Platform: | Size: 1600512 | Author: 王越 | Hits:

[Other Embeded program] trafficLight-verilog

Description: 交通灯状态机的实现，用verilog HDL编程，Xilinx ISE 6仿真，在实际电路中得到验证．-traffic lights to achieve the state machine, with verilog HDL programming, Xilinx ISE 6 simulation, the actual circuit have been tested.
Platform: | Size: 1532928 | Author: 王越 | Hits:

[VHDL-FPGA-Verilog] firfpga

Description: 在利用FPGA实现数字信号处理方面，分布式算法发挥着关键作用，与传统的乘积-积结构相比，具有并行处理的高效性特点。详细研究了基于FPGA、采用分布式算法实现FIR数字滤波器的原理和方法，并通过Xilinx ISE在Modelsim下进行了仿真。 -FPGA using digital signal processing, distributed algorithm plays a key role with the traditional product-plot structure compared with the efficient parallel processing features. Based on a detailed study of the FPGA, using distributed algorithm FIR digital filter method and the principle, and through the Xilinx ISE under the Modelsim simulation.
Platform: | Size: 228352 | Author: yaoming | Hits:

[VHDL-FPGA-Verilog] ledleft

Description: xilinx的SPARTAN-3E入门开发板实例 根据官方公布的led移动范例改写。 原范例仅提供了源代码、烧写文件以及dos窗口下使用的烧写bat文件。 本实例采用了ise7.1i创建，在ise下重建整个工程，有助于初学者理解使用。-xilinx the SPARTAN-3E portal development board examples According to the official announcement led to the mobile Examples rewritten. Original examples provided only source code, dos burning documents and the use of the window of burning bat documents. The examples used ise7.1i creation, the redevelopment of the entire ise project will help beginners understand the use.
Platform: | Size: 393216 | Author: 韩兆伟 | Hits:

[Software Engineering] Xilinx_ISE_chinese

Description: Xilinx ISE的中文教程,十分易懂,包你学会,当初我就是靠这个学的-Xilinx ISE Chinese guides, very easy to understand, including the Institute of you, when I was on the school
Platform: | Size: 934912 | Author: 何思涵 | Hits:

[VHDL-FPGA-Verilog] myUART

Description: 这是我用Xilinx公司的sparten3开发板,ISE集成开发环境，用VHDL语言开发的串口全双工通信程序，供大家参考，共同学习。-This is the company I used the sparten3 Xilinx development boards, ISE Integrated Development Environment, Using VHDL development of the full-duplex serial communication program, for your reference, learning together.
Platform: | Size: 657408 | Author: 汪莉莉 | Hits:

[Embeded-SCM Develop] vhdlcodes

Description: FPGA/CPLD集成开发环境ISE的使用详解 示例代码1-FPGA/CPLD Integrated Development Environment ISE Comments on the use of a code sample
Platform: | Size: 114688 | Author: 邓志斌 | Hits:

[VHDL-FPGA-Verilog] sampleVHDL

Description: 采样等精度测量的VHDL程序．．在xilinx ISE 8.1上验证通过-sampling and other precision measurement of VHDL program. . In xilinx ISE tested through 8.1.
Platform: | Size: 122880 | Author: 罗辉 | Hits:

[Software Engineering] xilinx_ise_edk8.1_register

Description: xilinx ise edk8.1注册器-xilinx ise edk8.1 for registration
Platform: | Size: 65536 | Author: 张菊兰 | Hits:

[VHDL-FPGA-Verilog] CCDOUT

Description: CCD信号由于其特殊性,一般不能有信号源产生,本程序采用VHDL语言，以ISE为开发平台，产生了模拟CCD信号的数字信号，只需经DA转换便能实现-CCD signal because of its uniqueness, not generally produce a signal source, the procedures used VHDL, ISE as a development platform, have CCD signal simulation of digital signal only after DA conversion can be achieved
Platform: | Size: 1085440 | Author: 刘小军 | Hits:

[Software Engineering] XilinxISE

Description: XILINX开发环境ISE的入门操作指导，对于FPGA的初学者有较大的帮助。-XILINX ISE development environment operating guidance for beginners, For FPGA beginners have more help.
Platform: | Size: 286720 | Author: liujie | Hits:
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